Hi Jiri, How much do you think this is a RISC-V specific problem, or one that may affect other SMP processors? Should we add an RTEMS API for this capability instead of shimming some Asm into a test case?
On Sun, Apr 11, 2021 at 1:30 PM Jiri Gaisler <j...@gaisler.se> wrote: > > smpfatal08 fails on SMP RISC-V systems because all cpus are started by the > boot-loader and clobber the test output. This patch stops the secondary cpus > with a WFI (wait-for-interrupt). Harmless if only one cpu is started by the > loader, as in the griscv bsp. > > _______________________________________________ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
