On Sun, Feb 21, 2021 at 12:00 AM Gedare Bloom <ged...@rtems.org> wrote:
> Hi Sanskar, > > We had a student (Utkarsh) work on this project last year. I have CC'd > him here, and he may be able to suggest some ideas/updates. > > On Sat, Feb 20, 2021 at 7:17 AM Sanskar Khandelwal > <kdsanska...@gmail.com> wrote: > > > > Hello, > Hello Sanskar, > > I want to do a project related to memory Protection, I am thinking of > adding support for Physical Memory Protection(PMP) to risc-v based bsps. > Actually I came across this 2 days back so I know the basic concept but I > don't have a clear understanding of how actually it will be implemented > yet. So before going into more detail I wanted to ask, can this be a gsoc > project ? Also if someone can guide me on how I should proceed further it > will be a big help. There are a few things to be kept in mind while adding support for an MPU/PMP. You need to get the linker script in order to place the relevant sections (txt, bss,etc.) in the memory region of your choice. Then you need to set up page table entries for these regions, with proper access flags, at system startup. Setting up page table entries is an architecture specif task, as each architecture has its own implementation of MPU/PMP( although the overarching concept is the same). You may have to look at the RISC-V manual and a few other sources to get a 'feel' for how this is to be done. You can have a look at this post <http://heshamelmatary.blogspot.com/2013/09/inside-low-level-details-of-rtemsmmu.html>, for the low-level details of ARMv7 MMU implementation. I would suggest you to first look at how it is done for ARMv7 MMU, by setting up a debugger and walking through the whole process. You can take up the realview BSP for the same. > > > thanks > > --sanskar >
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