On 12/2/21 5:14 am, Chris Johns wrote: >On 13/2/21 10:10 am, Joel Sherrill wrote: >> On Fri, Feb 12, 2021 at 5:06 PM Chris Johns <chr...@rtems.org >> <mailto:chr...@rtems.org>> wrote: >> >> On 13/2/21 12:25 am, Jan Sommer wrote: >> > This patchset implements a driver for the cadence-spi >> > device of the Xilinx Zynq-7000 based SoCs using the spidev API.s >> >> Thanks for the driver. >> >> A quick review of the differences between the Zynq and Ulttrascale in >> this >> document from Xilinx: >> >> >> https://www.xilinx.com/support/documentation/user_guides/ug1213-zynq-migration-guide.pdf >> >> <https://www.xilinx.com/support/documentation/user_guides/ug1213-zynq-migration-guide.pdf> >> >> shows the SPI hardware is the same. Should this driver be located under >> `bsps/shared/dev/spi` and then shared? >> >> If Kinsey or Jan confirms, then yes it should. > > Thanks. > >> Kinsey has had a number >> of drivers work after addressing 64-bit clean issues. > > Nice. Are these in the tree?
Looking at the register setup for the two SPI instances in MPSoC, I have verified that these peripherals are identical. It should definitely go in bsps/shared/dev/spi. I have already committed some of the driver movement from Zynq or ARM to bsps/shared/dev. There is still quite a bit more to pull out of the Zynq BSP that I haven't quite gotten to. Kinsey _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel