This patch updates the BSP to have basic lwIP support.
This includes a new section in the linker base file in case
lwIP is used for the STM32H7 BSP. This is not an ideal solution
but I have not found a better one.
Other adaptions include a new option to load lwIP and disabling
some preprocessor guards if the options is set to true.
I also did some smaller tweaks like providing another default
implementation for HAL_GetTick() and a small include fix
---
bsps/arm/shared/start/linkcmds.base | 13 ++++++++++++
bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c | 16 ++++++++------
.../stm32h7/include/Legacy/stm32_hal_legacy.h | 4 +++-
bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h | 1 +
bsps/arm/stm32h7/start/bspstart.c | 2 +-
spec/build/bsps/arm/stm32h7/bspstm32h7.yml | 2 ++
spec/build/bsps/arm/stm32h7/optlwip.yml | 21 +++++++++++++++++++
7 files changed, 51 insertions(+), 8 deletions(-)
create mode 100644 spec/build/bsps/arm/stm32h7/optlwip.yml
diff --git a/bsps/arm/shared/start/linkcmds.base
b/bsps/arm/shared/start/linkcmds.base
index a56e23fe93..375bd0a8f4 100644
--- a/bsps/arm/shared/start/linkcmds.base
+++ b/bsps/arm/shared/start/linkcmds.base
@@ -381,6 +381,19 @@ SECTIONS {
bsp_section_nocacheheap_size = bsp_section_nocacheheap_end -
bsp_section_nocacheheap_begin;
bsp_section_nocachenoload_size = bsp_section_nocachenoload_end -
bsp_section_nocachenoload_begin;
+ /* Not an ideal solution but required for lwIP on the STM32H7 BSP.
+ This places the DMA descriptors for lwIP at the start of SRAM3.
+ The MPU still needs to be configured for the DMA descriptor regions to
be
+ bufferable, non-cacheable, non-shareable (first 256 bytes) */
+ .lwip_sec_stm32h7 (NOLOAD) : ALIGN_WITH_INPUT {
+ . = ABSOLUTE(0x30040000);
+ *(.RxDecripSection)
+ . = ABSOLUTE(0x30040060);
+ *(.TxDecripSection)
+ . = ABSOLUTE(0x30040200);
+ *(.RxArraySection)
+ } >SRAM_3 AT> REGION_TEXT_LOAD
+
/* FIXME */
RamBase = ORIGIN (REGION_WORK);
RamSize = LENGTH (REGION_WORK);
diff --git a/bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c
b/bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c
index 4f2634df5b..6c3590bce8 100644
--- a/bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c
+++ b/bsps/arm/stm32h7/hal/stm32h7xx_hal_eth.c
@@ -146,6 +146,10 @@
/* Includes
------------------------------------------------------------------*/
#include "stm32h7xx_hal.h"
+#ifdef __rtems__
+#include <bspopts.h>
+#endif
+
/** @addtogroup STM32H7xx_HAL_Driver
* @{
*/
@@ -361,10 +365,10 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
/*------------------ MAC, MTL and DMA default Configuration
----------------*/
ETH_MACDMAConfig(heth);
-#ifndef __rtems__
+#if STM32H7_ADD_LWIP == 1
/* SET DSL to 64 bit */
MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_DSL, ETH_DMACCR_DSL_64BIT);
-#endif /* __rtems__ */
+#endif
/* Set Receive Buffers Length (must be a multiple of 4) */
if ((heth->Init.RxBuffLen % 0x4U) != 0x0U)
@@ -2647,7 +2651,7 @@ static void ETH_MAC_MDIO_ClkConfig(ETH_HandleTypeDef
*heth)
*/
static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)
{
-#ifndef __rtems__
+#if STM32H7_ADD_LWIP == 1
ETH_DMADescTypeDef *dmatxdesc;
uint32_t i;
@@ -2674,7 +2678,7 @@ static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)
/* Set Transmit Descriptor Tail pointer */
WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t) heth->Init.TxDesc);
-#endif /* __rtems__ */
+#endif /* STM32H7_ADD_LWIP == 1 */
}
/**
@@ -2686,7 +2690,7 @@ static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)
*/
static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth)
{
-#ifndef __rtems__
+#if STM32H7_ADD_LWIP == 1
ETH_DMADescTypeDef *dmarxdesc;
uint32_t i;
@@ -2719,7 +2723,7 @@ static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth)
/* Set Receive Descriptor Tail pointer Address */
WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc +
(((uint32_t)(ETH_RX_DESC_CNT - 1))*sizeof(ETH_DMADescTypeDef)))));
-#endif /* __rtems__ */
+#endif /* STM32H7_ADD_LWIP == 1 */
}
/**
diff --git a/bsps/arm/stm32h7/include/Legacy/stm32_hal_legacy.h
b/bsps/arm/stm32h7/include/Legacy/stm32_hal_legacy.h
index c311c1618e..c4fa5d7151 100644
--- a/bsps/arm/stm32h7/include/Legacy/stm32_hal_legacy.h
+++ b/bsps/arm/stm32h7/include/Legacy/stm32_hal_legacy.h
@@ -420,7 +420,9 @@
#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
-#define PAGESIZE FLASH_PAGE_SIZE
+/* Commented out for the RTEMS BSP because there can be nameclashes with
another
+similar defininition in limits.h */
+//#define PAGESIZE FLASH_PAGE_SIZE
#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
b/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
index e9fecc4aa0..b171f7dac7 100644
--- a/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
+++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_uart.h
@@ -27,6 +27,7 @@ extern "C" {
/* Includes
------------------------------------------------------------------*/
#include "stm32h7xx_hal_def.h"
+#include "stm32h7xx_hal_dma.h"
/** @addtogroup STM32H7xx_HAL_Driver
* @{
diff --git a/bsps/arm/stm32h7/start/bspstart.c
b/bsps/arm/stm32h7/start/bspstart.c
index 2fc8133cca..d942fbdcb3 100644
--- a/bsps/arm/stm32h7/start/bspstart.c
+++ b/bsps/arm/stm32h7/start/bspstart.c
@@ -34,7 +34,7 @@
uint32_t HAL_GetTick(void)
{
- return 0;
+ return rtems_clock_get_ticks_since_boot();
}
uint32_t stm32h7_systick_frequency(void)
diff --git a/spec/build/bsps/arm/stm32h7/bspstm32h7.yml
b/spec/build/bsps/arm/stm32h7/bspstm32h7.yml
index 1e54838c66..0d6a059ba9 100644
--- a/spec/build/bsps/arm/stm32h7/bspstm32h7.yml
+++ b/spec/build/bsps/arm/stm32h7/bspstm32h7.yml
@@ -244,6 +244,8 @@ links:
uid: ../../optconsolebaud
- role: build-dependency
uid: ../../optconsoleirq
+- role: build-dependency
+ uid: optlwip
- role: build-dependency
uid: ../grp
- role: build-dependency
diff --git a/spec/build/bsps/arm/stm32h7/optlwip.yml
b/spec/build/bsps/arm/stm32h7/optlwip.yml
new file mode 100644
index 0000000000..caf38d3663
--- /dev/null
+++ b/spec/build/bsps/arm/stm32h7/optlwip.yml
@@ -0,0 +1,21 @@
+actions:
+- get-boolean: null
+- env-assign: null
+- define-condition: null
+build-type: option
+default: false
+default-by-variant: []
+enabled-by: true
+format: '{}'
+links: []
+name: STM32H7_ADD_LWIP
+description: |
+ This changes the code to allow lwIP to work properly, based on the
+ STM32 lwIP example. The lwIP DMA descriptors will be placed inside
+ SRAM3, similarly to the linker script provided by STM. The user
+ still needs to set the lwIP heap memory location, configure the MPU
+ properly and do the configuration of the hardware and other peripherals.
+type: build
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2020 Robin Mueller
--
2.29.2.windows.2
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