On Sat, Dec 5, 2020, 12:15 AM Richi Dubey <richidu...@gmail.com> wrote:
> I tried searching it on Google and RTEMS Documentation, but couldn't find > anything that explains this. > > On Sat, Dec 5, 2020 at 11:34 AM Richi Dubey <richidu...@gmail.com> wrote: > >> Hi, >> >> Can someone please help me understand what is meant by level? What is >> meant by the dispatch level and the pin level and other such definitions? I >> just want a high-level idea of what we achieve by having levels and why we >> need them. >> > This is a critical section which prevents thread context switches from occurring while the dispatch level is not zero. This is generally used so dispatching is deferred until the end of operations. It is also used so we do not attempt to switch to another thread while in the middle of an interrupt service routine I would think this was documented somewhere but honestly I don't know where. If someone has a suggestion , then we should add it. It would seem that we need a discussion of the types of critical sections, when they are used, and the difference between uniprocessor and symmetric processing configurations. > >> Why do we have: >> >> _Assert( cpu_self->thread_dispatch_disable_level == 1 ); >> >> in some codes? >> > This means that the software should not be called when dispatching is disabled. This may mean not from an interrupt service routine although that is by implication since you could have checked the interrupt nest level. This can prevent some methods from being called from a user extension. --joel > _______________________________________________ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel
_______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
