On Fri, Dec 4, 2020 at 2:07 AM Christian Mauderer
<christian.maude...@embedded-brains.de
<mailto:christian.maude...@embedded-brains.de>> wrote:
This allows simpler creation of own dts files for custom boards.
Update #4180
---
bsps/arm/imxrt/dts/imxrt1050-evkb.dts | 287 +-----------------
bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi | 309 ++++++++++++++++++++
spec/build/bsps/arm/imxrt/bspimxrt.yml | 1 +
3 files changed, 312 insertions(+), 285 deletions(-)
create mode 100644 bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi
diff --git a/bsps/arm/imxrt/dts/imxrt1050-evkb.dts
b/bsps/arm/imxrt/dts/imxrt1050-evkb.dts
index 968ca1dbdc..8b2c571bba 100644
--- a/bsps/arm/imxrt/dts/imxrt1050-evkb.dts
+++ b/bsps/arm/imxrt/dts/imxrt1050-evkb.dts
@@ -34,293 +34,10 @@
* rtems-bin2c -C -N imxrt_dtb
"${BSP_DIR}/dts/imxrt1050-evkb.dtb" "${BSP_DIR}/dts/imxrt1050-evkb.c"
*/
-#include <imxrt/imxrt1050-pinfunc.h>
-
/dts-v1/;
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- chosen: chosen {};
-
- aliases {
- gpio0 = &gpio1;
- gpio1 = &gpio2;
- gpio2 = &gpio3;
- gpio3 = &gpio4;
- gpio4 = &gpio5;
- };
-
- nvic: interrupt-controller@e000e100 {
- compatible = "arm,armv7m-nvic";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0xe000e100 0xc00>;
- };
-
- systick: timer@e000e010 {
- compatible = "arm,armv7m-systick";
- reg = <0xe000e010 0x10>;
- status = "disabled";
- };
-
- soc {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&nvic>;
- ranges;
-
- aips-bus@40000000 {
- compatible = "fsl,aips-bus", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x40000000 0x00100000>;
- ranges;
-
- gpio5: gpio@400c0000 {
- compatible = "fsl,imxrt-gpio",
- "fsl,imx6ul-gpio", "fsl,imx35-gpio";
- reg = <0x400c0000 0x4000>;
- interrupts = <88>, <89>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- aips-bus@40100000 {
- compatible = "fsl,aips-bus", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x40100000 0x00100000>;
- ranges;
-
- gpio4: gpio@401c4000 {
- compatible = "fsl,imxrt-gpio",
- "fsl,imx6ul-gpio", "fsl,imx35-gpio";
- reg = <0x401c4000 0x4000>;
- interrupts = <86>, <87>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio3: gpio@401c0000 {
- compatible = "fsl,imxrt-gpio",
- "fsl,imx6ul-gpio", "fsl,imx35-gpio";
- reg = <0x401c0000 0x4000>;
- interrupts = <84>, <85>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio2: gpio@401bc000 {
- compatible = "fsl,imxrt-gpio",
- "fsl,imx6ul-gpio", "fsl,imx35-gpio";
- reg = <0x401bc000 0x4000>;
- interrupts = <82>, <83>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- gpio1: gpio@401b8000 {
- compatible = "fsl,imxrt-gpio",
- "fsl,imx6ul-gpio", "fsl,imx35-gpio";
- reg = <0x401b8000 0x4000>;
- interrupts = <80>, <81>, <72>, <73>,
<74>,
- <75>, <76>, <77>, <78>, <79>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- lpuart1: uart@40184000 {
- compatible = "nxp,imxrt-lpuart";
- reg = <0x40184000 0x4000>;
- interrupts = <20>;
- status = "disabled";
- rtems,path = "/dev/ttyS1";
- };
-
- lpuart2: uart@40188000 {
- compatible = "nxp,imxrt-lpuart";
- reg = <0x40188000 0x4000>;
- interrupts = <21>;
- status = "disabled";
- rtems,path = "/dev/ttyS2";
- };
-
- lpuart3: uart@4018c000 {
- compatible = "nxp,imxrt-lpuart";
- reg = <0x4018c000 0x4000>;
- interrupts = <22>;
- status = "disabled";
- rtems,path = "/dev/ttyS3";
- };
-
- lpuart4: uart@40190000 {
- compatible = "nxp,imxrt-lpuart";
- reg = <0x40190000 0x4000>;
- interrupts = <23>;
- status = "disabled";
- rtems,path = "/dev/ttyS4";
- };
-
- lpuart5: uart@40194000 {
- compatible = "nxp,imxrt-lpuart";
- reg = <0x40194000 0x4000>;
- interrupts = <24>;
- status = "disabled";
- rtems,path = "/dev/ttyS5";
- };
-
- lpuart6: uart@40198000 {
- compatible = "nxp,imxrt-lpuart";
- reg = <0x40198000 0x4000>;
- interrupts = <25>;
- status = "disabled";
- rtems,path = "/dev/ttyS6";
- };
-
- lpuart7: uart@4019c000 {
- compatible = "nxp,imxrt-lpuart";
- reg = <0x4019c000 0x4000>;
- interrupts = <26>;
- status = "disabled";
- rtems,path = "/dev/ttyS7";
- };
-
- lpuart8: uart@401a0000 {
- compatible = "nxp,imxrt-lpuart";
- reg = <0x401a0000 0x4000>;
- interrupts = <27>;
- status = "disabled";
- rtems,path = "/dev/ttyS8";
- };
-
- iomuxc: pinctrl@401f8000 {
- compatible = "nxp,imxrt1050-iomuxc";
- reg = <0x401f8000 0x4000>;
- };
- };
-
- aips-bus@40200000 {
- compatible = "fsl,aips-bus", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x40200000 0x00100000>;
- ranges;
-
- fec1: ethernet@402d8000 {
- compatible = "fsl,imxrt-fec",
"fsl,imx6ul-fec";
- reg = <0x402d8000 0x4000>;
- interrupt-names = "int0", "pps";
- interrupts = <114>, <115>;
- fsl,num-tx-queues = <1>;
- fsl,num-rx-queues = <1>;
- phy-mode = "rmii";
- status = "disabled";
- };
- };
-
- aips-bus@40300000 {
- compatible = "fsl,aips-bus", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x40300000 0x00100000>;
- ranges;
-
- lpspi1: lpspi@40394000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "nxp,imxrt-lpspi";
- reg = <0x40394000 0x4000>;
- interrupts = <32>;
- status = "disabled";
- rtems,path = "/dev/spi1";
- };
-
- lpspi2: lpspi@40398000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "nxp,imxrt-lpspi";
- reg = <0x40398000 0x4000>;
- interrupts = <33>;
- status = "disabled";
- rtems,path = "/dev/spi2";
- };
-
- lpspi3: lpspi@4039c000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "nxp,imxrt-lpspi";
- reg = <0x4039c000 0x4000>;
- interrupts = <34>;
- status = "disabled";
- rtems,path = "/dev/spi3";
- };
-
- lpspi4: lpspi@403a0000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "nxp,imxrt-lpspi";
- reg = <0x403a0000 0x4000>;
- interrupts = <35>;
- status = "disabled";
- rtems,path = "/dev/spi4";
- };
-
- lpi2c1: lpi2c@403f0000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "nxp,imxrt-lpi2c";
- reg = <0x403f0000 0x4000>;
- interrupts = <28>;
- status = "disabled";
- rtems,path = "/dev/i2c1";
- };
-
- lpi2c2: lpi2c@403f4000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "nxp,imxrt-lpi2c";
- reg = <0x403f4000 0x4000>;
- interrupts = <29>;
- status = "disabled";
- rtems,path = "/dev/i2c2";
- };
-
- lpi2c3: lpi2c@403f8000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "nxp,imxrt-lpi2c";
- reg = <0x403f8000 0x4000>;
- interrupts = <30>;
- status = "disabled";
- rtems,path = "/dev/i2c3";
- };
-
- lpi2c4: lpi2c@403fc000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "nxp,imxrt-lpi2c";
- reg = <0x403fc000 0x4000>;
- interrupts = <31>;
- status = "disabled";
- rtems,path = "/dev/i2c4";
- };
- };
- };
-};
+#include <imxrt/imxrt1050-pinfunc.h>
+#include <imxrt/imxrt1050.dtsi>
&lpuart1 {
pinctrl-0 = <&pinctrl_lpuart1>;
diff --git a/bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi
b/bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi
new file mode 100644
index 0000000000..ea55eff723
--- /dev/null
+++ b/bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi
@@ -0,0 +1,309 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH
(http://www.embedded-brains.de <http://www.embedded-brains.de>)
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer
in the
+ * documentation and/or other materials provided with the
distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen: chosen {};
+
+ aliases {
+ gpio0 = &gpio1;
+ gpio1 = &gpio2;
+ gpio2 = &gpio3;
+ gpio3 = &gpio4;
+ gpio4 = &gpio5;
+ };
+
+ nvic: interrupt-controller@e000e100 {
+ compatible = "arm,armv7m-nvic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0xe000e100 0xc00>;
+ };
+
+ systick: timer@e000e010 {
+ compatible = "arm,armv7m-systick";
+ reg = <0xe000e010 0x10>;
+ status = "disabled";
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&nvic>;
+ ranges;
+
+ aips-bus@40000000 {
+ compatible = "fsl,aips-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x40000000 0x00100000>;
+ ranges;
+
+ gpio5: gpio@400c0000 {
+ compatible = "fsl,imxrt-gpio",
+ "fsl,imx6ul-gpio", "fsl,imx35-gpio";
+ reg = <0x400c0000 0x4000>;
+ interrupts = <88>, <89>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ aips-bus@40100000 {
+ compatible = "fsl,aips-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x40100000 0x00100000>;
+ ranges;
+
+ gpio4: gpio@401c4000 {
+ compatible = "fsl,imxrt-gpio",
+ "fsl,imx6ul-gpio", "fsl,imx35-gpio";
+ reg = <0x401c4000 0x4000>;
+ interrupts = <86>, <87>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio3: gpio@401c0000 {
+ compatible = "fsl,imxrt-gpio",
+ "fsl,imx6ul-gpio", "fsl,imx35-gpio";
+ reg = <0x401c0000 0x4000>;
+ interrupts = <84>, <85>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio2: gpio@401bc000 {
+ compatible = "fsl,imxrt-gpio",
+ "fsl,imx6ul-gpio", "fsl,imx35-gpio";
+ reg = <0x401bc000 0x4000>;
+ interrupts = <82>, <83>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio1: gpio@401b8000 {
+ compatible = "fsl,imxrt-gpio",
+ "fsl,imx6ul-gpio", "fsl,imx35-gpio";
+ reg = <0x401b8000 0x4000>;
+ interrupts = <80>, <81>, <72>, <73>,
<74>,
+ <75>, <76>, <77>, <78>, <79>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ lpuart1: uart@40184000 {
+ compatible = "nxp,imxrt-lpuart";
+ reg = <0x40184000 0x4000>;
+ interrupts = <20>;
+ status = "disabled";
+ rtems,path = "/dev/ttyS1";
+ };
+
+ lpuart2: uart@40188000 {
+ compatible = "nxp,imxrt-lpuart";
+ reg = <0x40188000 0x4000>;
+ interrupts = <21>;
+ status = "disabled";
+ rtems,path = "/dev/ttyS2";
+ };
+
+ lpuart3: uart@4018c000 {
+ compatible = "nxp,imxrt-lpuart";
+ reg = <0x4018c000 0x4000>;
+ interrupts = <22>;
+ status = "disabled";
+ rtems,path = "/dev/ttyS3";
+ };
+
+ lpuart4: uart@40190000 {
+ compatible = "nxp,imxrt-lpuart";
+ reg = <0x40190000 0x4000>;
+ interrupts = <23>;
+ status = "disabled";
+ rtems,path = "/dev/ttyS4";
+ };
+
+ lpuart5: uart@40194000 {
+ compatible = "nxp,imxrt-lpuart";
+ reg = <0x40194000 0x4000>;
+ interrupts = <24>;
+ status = "disabled";
+ rtems,path = "/dev/ttyS5";
+ };
+
+ lpuart6: uart@40198000 {
+ compatible = "nxp,imxrt-lpuart";
+ reg = <0x40198000 0x4000>;
+ interrupts = <25>;
+ status = "disabled";
+ rtems,path = "/dev/ttyS6";
+ };
+
+ lpuart7: uart@4019c000 {
+ compatible = "nxp,imxrt-lpuart";
+ reg = <0x4019c000 0x4000>;
+ interrupts = <26>;
+ status = "disabled";
+ rtems,path = "/dev/ttyS7";
+ };
+
+ lpuart8: uart@401a0000 {
+ compatible = "nxp,imxrt-lpuart";
+ reg = <0x401a0000 0x4000>;
+ interrupts = <27>;
+ status = "disabled";
+ rtems,path = "/dev/ttyS8";
+ };
+
+ iomuxc: pinctrl@401f8000 {
+ compatible = "nxp,imxrt1050-iomuxc";
+ reg = <0x401f8000 0x4000>;
+ };
+ };
+
+ aips-bus@40200000 {
+ compatible = "fsl,aips-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x40200000 0x00100000>;
+ ranges;
+
+ fec1: ethernet@402d8000 {
+ compatible = "fsl,imxrt-fec",
"fsl,imx6ul-fec";
+ reg = <0x402d8000 0x4000>;
+ interrupt-names = "int0", "pps";
+ interrupts = <114>, <115>;
+ fsl,num-tx-queues = <1>;
+ fsl,num-rx-queues = <1>;
+ phy-mode = "rmii";
+ status = "disabled";
+ };
+ };
+
+ aips-bus@40300000 {
+ compatible = "fsl,aips-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x40300000 0x00100000>;
+ ranges;
+
+ lpspi1: lpspi@40394000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nxp,imxrt-lpspi";
+ reg = <0x40394000 0x4000>;
+ interrupts = <32>;
+ status = "disabled";
+ rtems,path = "/dev/spi1";
+ };
+
+ lpspi2: lpspi@40398000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nxp,imxrt-lpspi";
+ reg = <0x40398000 0x4000>;
+ interrupts = <33>;
+ status = "disabled";
+ rtems,path = "/dev/spi2";
+ };
+
+ lpspi3: lpspi@4039c000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nxp,imxrt-lpspi";
+ reg = <0x4039c000 0x4000>;
+ interrupts = <34>;
+ status = "disabled";
+ rtems,path = "/dev/spi3";
+ };
+
+ lpspi4: lpspi@403a0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nxp,imxrt-lpspi";
+ reg = <0x403a0000 0x4000>;
+ interrupts = <35>;
+ status = "disabled";
+ rtems,path = "/dev/spi4";
+ };
+
+ lpi2c1: lpi2c@403f0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nxp,imxrt-lpi2c";
+ reg = <0x403f0000 0x4000>;
+ interrupts = <28>;
+ status = "disabled";
+ rtems,path = "/dev/i2c1";
+ };
+
+ lpi2c2: lpi2c@403f4000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nxp,imxrt-lpi2c";
+ reg = <0x403f4000 0x4000>;
+ interrupts = <29>;
+ status = "disabled";
+ rtems,path = "/dev/i2c2";
+ };
+
+ lpi2c3: lpi2c@403f8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nxp,imxrt-lpi2c";
+ reg = <0x403f8000 0x4000>;
+ interrupts = <30>;
+ status = "disabled";
+ rtems,path = "/dev/i2c3";
+ };
+
+ lpi2c4: lpi2c@403fc000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nxp,imxrt-lpi2c";
+ reg = <0x403fc000 0x4000>;
+ interrupts = <31>;
+ status = "disabled";
+ rtems,path = "/dev/i2c4";
+ };
+ };
+ };
+};
diff --git a/spec/build/bsps/arm/imxrt/bspimxrt.yml
b/spec/build/bsps/arm/imxrt/bspimxrt.yml
index cc9659dee0..85c51e04a8 100644
--- a/spec/build/bsps/arm/imxrt/bspimxrt.yml
+++ b/spec/build/bsps/arm/imxrt/bspimxrt.yml
@@ -95,6 +95,7 @@ install:
- bsps/arm/imxrt/include/bsp/irq.h
- destination: ${BSP_INCLUDEDIR}/imxrt
source:
+ - bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi
- bsps/arm/imxrt/include/imxrt/imxrt1050-pinfunc.h
- bsps/arm/imxrt/include/imxrt/memory.h
- bsps/arm/imxrt/include/imxrt/mpu-config.h
--
2.26.2
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