On 9/12/20 9:28 AM, Karel Gardas wrote: > On 9/12/20 6:59 AM, Gedare Bloom wrote: >> On Fri, Sep 11, 2020 at 11:53 AM Karel Gardas <karel.gar...@centrum.cz> >> wrote: >>> >>> On 9/11/20 6:16 PM, Gedare Bloom wrote: >>>> Looks to be coming through >>>> >>>> cpukit/score/cpu/i386/include/rtems/asm.h:157 movb >>>> imps_apic_cpu_map(\REG),\REG /* CPU ID in REG */ >>>> >>>> The assembler is right to complain. movb has to target one of the >>>> 1-byte mnemonics, so this should be %al for the LSB of %eax. One needs >>>> to check through this logic carefully, but I think the right thing to >>>> do here is: >>>> movzbl imps_apic_cpu_map(\REG),\REG >>>> >>>> That should do the trick. Can you test it locally? >>> >>> Sure! Builds fine and testsuite testing reveals: >>> >> Great. I opened #4076 to apply this fix on 5 branch. > > Wait a minute. I've thought 5 branch is perfectly fine. What's broken is > master. Well, 5.1rc2 and 5.1 release were fine for SMP on pc386 so I > expected 5 branch be too. -- Anyway, I'll test that for sure.
I've tested 5 branch and it compiles and works fine with SMP so the fix is needed only on master branch. Karel _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
