On Thu, Aug 13, 2020 at 9:49 PM 朱忠杰 <zhongjiez...@gmail.com> wrote:
> Hi, everyone
>
> Is there any consideration why the FAST_IDLE is separated from normal
> path，can I change the FAST_IDLE like the following?
>
The looks reasonably clean. It evolved over time so a clean up may just have
been overdue.
Just to be clear, this is a special mode only to be used on simulators when
you know the only source of interrupts is the clock tick. At this point, I
would
tend to say it is not needed by the sparc BSPs because sis and tsim
are very fast themselves and also recognize when nothing is happening so
can quickly advance the state of the processor to the next event.
But qemu and gdb based simulators tend to need this enabled to speed
up runs of the test application. sp01 (same as ticker) is a good judge.
It runs for 30 seconds of target time. I have seen it take over 5 minutes on
simulators without fast idle. Also this was added in the days when
development computers were much slower.
If you are looking at fast idle, which BSPs have it as an option would be
good to check also.
--joel
> #if defined(BSP_FEATURE_IRQ_EXTENSION) || \
> (CPU_SIMPLE_VECTORED_INTERRUPTS != TRUE)
> void Clock_isr(void *arg);
> void Clock_isr(void *arg)
> {
> #else
> rtems_isr Clock_isr(rtems_vector_number vector);
> rtems_isr Clock_isr(
> rtems_vector_number vector
> )
> {
> #endif
> /*
> * Accurate count of ISRs
> */
> Clock_driver_ticks += 1;
>
> #if CLOCK_DRIVER_ISRS_PER_TICK
> /*
> * The driver is multiple ISRs per clock tick.
> */
> if ( !Clock_driver_isrs ) {
> Clock_driver_timecounter_tick();
>
> Clock_driver_isrs = CLOCK_DRIVER_ISRS_PER_TICK_VALUE;
> }
> Clock_driver_isrs--;
> #else
> /*
> * The driver is one ISR per clock tick.
> */
> Clock_driver_timecounter_tick();
>
> #if CLOCK_DRIVER_USE_FAST_IDLE
> if (_SMP_Get_processor_maximum() == 1) {
> struct timecounter *tc;
> uint64_t us_per_tick;
> uint32_t interval;
> Per_CPU_Control *cpu_self;
>
> cpu_self = _Per_CPU_Get();
> tc = _Timecounter;
> us_per_tick = rtems_configuration_get_microseconds_per_tick();
> interval = (uint32_t) ((tc->tc_frequency * us_per_tick) / 1000000);
>
> while (
> cpu_self->thread_dispatch_disable_level ==
> cpu_self->isr_nest_level
> && cpu_self->heir == cpu_self->executing
> && cpu_self->executing->is_idle
> ) {
> ISR_lock_Context lock_context;
>
> _Timecounter_Acquire(&lock_context);
> _Timecounter_Tick_simple(
> interval,
> (*tc->tc_get_timecount)(tc),
> &lock_context
> );
> }
> }
> #endif
> #endif
> /*
> * Do the hardware specific per-tick action.
> *
> * The counter/timer may or may not be set to automatically reload.
> */
> Clock_driver_support_at_tick();
> }
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