On Thu, Jul 23, 2020 at 7:25 AM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote:
> Hello, > > On 23/07/2020 07:52, small...@aliyun.com wrote: > > Hello, > > I have a TI bsp which uses a ARM cortex A72 process. It has 4 cores > > and MMU enabled. > > So does rtems support SMP and MMU in such a platform? > > After searching the mail and source code, I only find a cortex A53 > > platform. > > AArch64 is currently not supported by RTEMS. Getting it to work in > 32-bit mode should be feasible using the existing RTEMS support, but > there is no out of the box support for it. > The xilinx-zynqmp BSP runs on aarch64 but using 32-bit mode. --joel > > _______________________________________________ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel
_______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel