On 26/6/19 3:53 pm, Sebastian Huber wrote:
> On 26/06/2019 00:22, Chris Johns wrote:
>> On 25/6/19 9:59 pm, Sebastian Huber wrote:
>>> Can't you use the
>>>
>>> B4.1.94 ID_PFR1, Processor Feature Register 1, VMSA
>>>
>>> and test for the Virtualization Extensions?
>>
>> This is a neater solution. Can I assume the ASID support part of the
>> virtualization extensions and op 3 is consistent?
>
> I checked the manual again. We should use:
>
> MPIDR, Multiprocessor Affinity Register
>
> Configurations
> This register is not implemented in architecture versions before ARMv7.
>
> U, bit[30], in an implementation that includes the Multiprocessing Extensions
>
> Indicates a Uniprocessor system, as distinct from processor 0 in a
> multiprocessor system. The possible values of this bit are:
> > 0
> Processor is part of a multiprocessor system.
> 1
> Processor is part of a uniprocessor system.
>
>>
>>>
>>> I am not sure if pre ARMv7-AR processors have this register.
>>>
>>
>> It indicates the ID-ISA should help but I cannot see how to determine R vs A
>> from them.
>
> It must be placed under the #if defined(__ARM_ARCH_7A__) scope.
>
To make sure I understand is what the code should be :
#if defined(__ARM_ARCH_7A__)
if (MPIDR & (1 << 39) == 0) {
arm_cp15_tlb_invalidate_entry_all_asids(mva);
}
else
#endif
{
arm_cp15_tlb_instruction_invalidate_entry(mva);
arm_cp15_tlb_data_invalidate_entry(mva);
}
?
Chris
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