On Wed, 5 Jun 2019 at 15:14, Sebastian Huber <sebastian.hu...@embedded-brains.de> wrote: > > On 05/06/2019 15:09, Hesham Almatary wrote: > > On Wed, 5 Jun 2019 at 07:11, Sebastian Huber > > <sebastian.hu...@embedded-brains.de> wrote: > >> Hello Sachin, > >> > >> On 05/06/2019 06:15,sachin.gh...@sifive.com wrote: > >>> Hi RTEMS dev team, > >>> > >>> I don’t know if I should send this query to users list or developer list. > >>> > >>> I am working on the getting RTEMS BSP ported on the one of RISC-V > >>> based SoC. > >>> > >>> Current RTEMS has support only for Spike simulator. > >>> > >> we have also support for Qemu. At least at some point in time it worked > >> with a non-upstream Qemu. I am not sure how far the upstreaming of the > >> Qemu support progressed in the last months. > >> > > Upstream QEMU runs RTEMS fine with -virt board. Also, I tested 32-bit RTEMS > > variants on Zynq-based FPGA with Bluespec cores, UART and DTB [1]. > > > > [1]https://github.com/bluespec/Piccolo > > > > This reminds me off your patch set you sent a couple of weeks ago. > Sorry, I forgot it after my holidays. Would you mind sending it again > rebased to the current master? > Sure, I am gonna work on it.
The current RTEMS RISC-V port is actually mature enough that I got it working on Spike, QEMU, Rocket Chip, Piccolo, Sail [1] and others. Thanks for your efforts, and I am looking forward to trying libbsd/riscv. [1] https://github.com/rems-project/sail > -- > Sebastian Huber, embedded brains GmbH > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > Phone : +49 89 189 47 41-16 > Fax : +49 89 189 47 41-09 > E-Mail : sebastian.hu...@embedded-brains.de > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
