Hello Joel, it is in line what GCC prints:
riscv-rtems5-gcc -print-multi-lib .; rv32i/ilp32;@march=rv32i@mabi=ilp32 rv32im/ilp32;@march=rv32im@mabi=ilp32 rv32imafd/ilp32d;@march=rv32imafd@mabi=ilp32d rv32iac/ilp32;@march=rv32iac@mabi=ilp32 rv32imac/ilp32;@march=rv32imac@mabi=ilp32 rv32imafc/ilp32f;@march=rv32imafc@mabi=ilp32f rv64imafd/lp64d;@march=rv64imafd@mabi=lp64d rv64imafd/lp64d/medany;@march=rv64imafd@mabi=lp64d@mcmodel=medany rv64imac/lp64;@march=rv64imac@mabi=lp64 rv64imac/lp64/medany;@march=rv64imac@mabi=lp64@mcmodel=medany rv64imafdc/lp64d;@march=rv64imafdc@mabi=lp64d rv64imafdc/lp64d/medany;@march=rv64imafdc@mabi=lp64d@mcmodel=medany I don't mind to change it, but it should be consistent with ARM. -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
