Hello Avi,
On 13/01/2019 22:51, Misra, Avinash wrote:
Hi,
My issue turned out to be a configuration issue where I was using the
incorrect scheduler. I was originally using #define
CONFIGURE_SCHEDULER_PRIORITY_AFFINITY_SMP when in fact I should have
been using #define CONFIGURE_SCHEDULER_EDF_SMP. This thread
(https://lists.rtems.org/pipermail/devel/2018-October/023349.html)
made that very clear to me.
why did you use a custom scheduler configuration?
However, I do wonder if this is documented as part of the BSD
documentation and I missed it? Is this already well documented or is
this something that should be included with the BSD/RTEMS Networking
documentation?
I think this should be documented in
https://git.rtems.org/rtems-libbsd/tree/libbsd.txt
This file needs an update in general.
Thanks,
Avi
*From:* devel <devel-boun...@rtems.org> *On Behalf Of *Misra, Avinash
*Sent:* Sunday, January 13, 2019 1:04 PM
*To:* rtems-de...@rtems.org <devel@rtems.org>
*Subject:* Zynq RTEMS 5 SMP Crashing on call to connect in socket.h
Hi,
I’m having a peculiar issue when running RTEMS in a SMP configuration
and trying to call connect on a TCP Client Socket which is that RTEMS
crashes when calling the system connect routine with the following error:
Fatal source: 10 <RTEMS_FATAL_SOURCE_SMP>
Fatal Code: 7 <0x00000007>
RTEMS version: 5.0.0.b3c624d8886db6e791babe5e0d4f8b28992e000a
RTEMS tools: 7.3.0 20180125 (RTEMS 5, RSB
9955b1a430677b12c04c77eb6502fae4bb6947b2, Newlib
08eab6396f678cf5e5968acaed0bae9fd129983b)
Executing Thread ID: 0x08a010003
Executing Thread Name: IRQS
This only seems to occur when I configure RTEMS to execute on both
cores of the A9 processor (by setting #define
CONFIGURE_MAXIMUM_PROCESSORS to 2). When I have #define
CONFIGURE_MAXIMUM_PROCESSORS set to 1 the program runs as expected,
connects to my TCP server and sends nominal data. Also, for what it’s
worth, the name of my task is not IRQS so I’m not sure why I keep
getting this exception in the IRQS thread.
My system.hdf file and MMU setup code look as follow:
System.hdf:
MMU Configuration file:
*#include*<bsp.h>
*#include*<bsp/start.h>
*#include*<bsp/arm-gic-irq.h>
*#include*<bsp/arm-cp15-start.h>
*#include*<bsp/arm-a9mpcore-start.h>
BSP_START_DATA_SECTION*static**const*arm_cp15_start_section_config
zynq_mmu_config_table[] = {
ARMV7_CP15_START_DEFAULT_SECTIONS,
{
.begin = 0xE0000000U,
.end = 0xE0300000U,
.flags = ARMV7_MMU_DEVICE | ARM_MMU_SECT_S
},{
.begin = 0xF8000000U,
.end = 0xF9000000U,
.flags = ARMV7_MMU_DEVICE | ARM_MMU_SECT_S
},{
.begin = 0x00000000U, /*RAM 0 START ADDR*/
.end = 0x0002FFFFU, /*RAM 0 END ADDR*/
.flags = ARMV7_MMU_DEVICE | ARM_MMU_SECT_S
},{
.begin = 0xFFFF0000U, /*RAM 1 START ADDR*/
.end = 0xFFFFFDFFU, /*RAM 1 END ADDR*/
.flags = ARMV7_MMU_DEVICE | ARM_MMU_SECT_S
},{
.begin = 0x41200000U, /*AXI GPIO*/
.end = 0x4120FFFFU, /*AXI GPIO*/
.flags = ARMV7_MMU_DEVICE | ARM_MMU_SECT_S
}
};
BSP_START_TEXT_SECTION *void**zynq_setup_mmu_and_cache*(*void*)
{
uint32_tctrl = arm_cp15_start_setup_mmu_and_cache(
ARM_CP15_CTRL_A,
ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
);
arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
ctrl,
(uint32_t*) bsp_translation_table_base,
ARM_MMU_DEFAULT_CLIENT_DOMAIN,
&zynq_mmu_config_table[0],
RTEMS_ARRAY_SIZE(zynq_mmu_config_table)
);
}
Does anyone have an idea of as to what may be going on here?
Thanks,
Avi
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