On 28/05/18 11:14, Hesham Almatary wrote:
On Mon, May 28, 2018 at 6:23 AM, Sebastian Huber
<sebastian.hu...@embedded-brains.de> wrote:
Hello,
we currently have a riscv32-rtems* and riscv64-rtems* tool chain. However,
the RISC-V GCC is a bi-arch compiler, e.g. we have
riscv32-rtems5-gcc --print-multi-lib
.;
rv32i/ilp32;@march=rv32i@mabi=ilp32
rv32im/ilp32;@march=rv32im@mabi=ilp32
rv32iac/ilp32;@march=rv32iac@mabi=ilp32
rv32imac/ilp32;@march=rv32imac@mabi=ilp32
rv32imafc/ilp32f;@march=rv32imafc@mabi=ilp32f
rv64imac/lp64;@march=rv64imac@mabi=lp64
rv64imafdc/lp64d;@march=rv64imafdc@mabi=lp64d
riscv64-rtems5-gcc --print-multi-lib
.;
rv32i/ilp32;@march=rv32i@mabi=ilp32
rv32im/ilp32;@march=rv32im@mabi=ilp32
rv32iac/ilp32;@march=rv32iac@mabi=ilp32
rv32imac/ilp32;@march=rv32imac@mabi=ilp32
rv32imafc/ilp32f;@march=rv32imafc@mabi=ilp32f
rv64imac/lp64;@march=rv64imac@mabi=lp64
rv64imafdc/lp64d;@march=rv64imafdc@mabi=lp64d
The only difference is the default ISA.
I suggest to merge the two tool chains into one riscv-rtems* variant.
We can get rid of riscv32* and just use riscv64* to build 32-bit
RTEMS. The question is whether it's easy/feasible to have just
"riscv-rtems*" toolchain (i.e. without 32 or 64 suffixes ), from
gcc/source-builder.
I try currently a different direction. I use custom multilibs and
changed the default cmodel to medany for the 64-bit variants. See
attached patch.
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.
Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
>From 5bb0b0a11d091a67b21445c70cf7e76259805442 Mon Sep 17 00:00:00 2001
From: Sebastian Huber <sebastian.hu...@embedded-brains.de>
Date: Mon, 28 May 2018 09:48:57 +0200
Subject: [PATCH] RISC-V: Add custom RTEMS multilibs
gcc/
* config.gcc (riscv*-*-elf* | riscv*-*-rtems*): Use custom
multilibs for riscv32-*-rtems* and riscv64-*-rtems*.
* config/riscv/t-rtems-32: New file.
* config/riscv/t-rtems-64: Likewise.
* config/riscv/rtems.h (TARGET_DEFAULT_CMODEL): Use CM_MEDANY
by default for 64-bit variants.
---
gcc/config.gcc | 24 +++++++++++++++---------
gcc/config/riscv/rtems.h | 3 +++
gcc/config/riscv/t-rtems-32 | 16 ++++++++++++++++
gcc/config/riscv/t-rtems-64 | 12 ++++++++++++
4 files changed, 46 insertions(+), 9 deletions(-)
create mode 100644 gcc/config/riscv/t-rtems-32
create mode 100644 gcc/config/riscv/t-rtems-64
diff --git a/gcc/config.gcc b/gcc/config.gcc
index d73e2cbc99a..14660ca717b 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2075,10 +2075,21 @@ riscv*-*-linux*)
;;
riscv*-*-elf* | riscv*-*-rtems*)
tm_file="elfos.h newlib-stdint.h ${tm_file} riscv/elf.h"
- case "x${enable_multilib}" in
- xno) ;;
- xyes) tmake_file="${tmake_file} riscv/t-elf-multilib" ;;
- *) echo "Unknown value for enable_multilib"; exit 1
+ case ${target} in
+ riscv32-*-rtems*)
+ tm_file="${tm_file} rtems.h riscv/rtems.h"
+ tmake_file="${tmake_file} riscv/t-rtems-32"
+ ;;
+ riscv64-*-rtems*)
+ tm_file="${tm_file} rtems.h riscv/rtems.h"
+ tmake_file="${tmake_file} riscv/t-rtems-64"
+ ;;
+ *)
+ case "x${enable_multilib}" in
+ xno) ;;
+ xyes) tmake_file="${tmake_file} riscv/t-elf-multilib" ;;
+ *) echo "Unknown value for enable_multilib"; exit 1
+ esac
esac
tmake_file="${tmake_file} riscv/t-riscv"
gnu_ld=yes
@@ -2086,11 +2097,6 @@ riscv*-*-elf* | riscv*-*-rtems*)
# Force .init_array support. The configure script cannot always
# automatically detect that GAS supports it, yet we require it.
gcc_cv_initfini_array=yes
- case ${target} in
- riscv*-*-rtems*)
- tm_file="${tm_file} rtems.h riscv/rtems.h"
- ;;
- esac
;;
riscv*-*-freebsd*)
tm_file="${tm_file} elfos.h ${fbsd_tm_file} riscv/freebsd.h"
diff --git a/gcc/config/riscv/rtems.h b/gcc/config/riscv/rtems.h
index 231b6a082ed..33bcb962d80 100644
--- a/gcc/config/riscv/rtems.h
+++ b/gcc/config/riscv/rtems.h
@@ -29,3 +29,6 @@
builtin_define ("__USE_INIT_FINI__"); \
builtin_assert ("system=rtems"); \
} while (0)
+
+#undef TARGET_DEFAULT_CMODEL
+#define TARGET_DEFAULT_CMODEL (TARGET_64BIT ? CM_MEDANY : CM_MEDLOW)
diff --git a/gcc/config/riscv/t-rtems-32 b/gcc/config/riscv/t-rtems-32
new file mode 100644
index 00000000000..35703369823
--- /dev/null
+++ b/gcc/config/riscv/t-rtems-32
@@ -0,0 +1,16 @@
+MULTILIB_OPTIONS =
+MULTILIB_DIRNAMES =
+
+MULTILIB_OPTIONS += march=rv32i/march=rv32im/march=rv32imafd/march=rv32iac/march=rv32imac/march=rv32imafc
+MULTILIB_DIRNAMES += rv32i rv32im rv32imafd rv32iac rv32imac rv32imafc
+
+MULTILIB_OPTIONS += mabi=ilp32/mabi=ilp32f/mabi=ilp32d
+MULTILIB_DIRNAMES += ilp32 ilp32f ilp32d
+
+MULTILIB_REQUIRED =
+MULTILIB_REQUIRED += march=rv32i/mabi=ilp32
+MULTILIB_REQUIRED += march=rv32im/mabi=ilp32
+MULTILIB_REQUIRED += march=rv32imafd/mabi=ilp32d
+MULTILIB_REQUIRED += march=rv32iac/mabi=ilp32
+MULTILIB_REQUIRED += march=rv32imac/mabi=ilp32
+MULTILIB_REQUIRED += march=rv32imafc/mabi=ilp32f
diff --git a/gcc/config/riscv/t-rtems-64 b/gcc/config/riscv/t-rtems-64
new file mode 100644
index 00000000000..1d4e2b23464
--- /dev/null
+++ b/gcc/config/riscv/t-rtems-64
@@ -0,0 +1,12 @@
+MULTILIB_OPTIONS =
+MULTILIB_DIRNAMES =
+
+MULTILIB_OPTIONS += march=rv64imafd/march=rv64imac
+MULTILIB_DIRNAMES += rv64imafd rv64imac
+
+MULTILIB_OPTIONS += mabi=lp64/mabi=lp64d
+MULTILIB_DIRNAMES += lp64 lp64d
+
+MULTILIB_REQUIRED =
+MULTILIB_REQUIRED += march=rv64imafd/mabi=lp64d
+MULTILIB_REQUIRED += march=rv64imac/mabi=lp64
--
2.13.6
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