--- cpukit/dev/serial/sc16is752-regs.h | 2 ++ cpukit/dev/serial/sc16is752.c | 20 ++++++++++++++++ cpukit/include/dev/serial/sc16is752.h | 45 +++++++++++++++++++++++++++++++++++ 3 files changed, 67 insertions(+)
diff --git a/cpukit/dev/serial/sc16is752-regs.h b/cpukit/dev/serial/sc16is752-regs.h index 8080074d2c..847874baab 100644 --- a/cpukit/dev/serial/sc16is752-regs.h +++ b/cpukit/dev/serial/sc16is752-regs.h @@ -107,6 +107,8 @@ extern "C" { #define EFR_RTS_FLOW_CTRL_EN (1u << 6) #define EFR_CTS_FLOW_CTRL_EN (1u << 7) +/* IOCONTROL: User accessible. Therefore see sc16is752.h for the defines. */ + #define SC16IS752_FIFO_DEPTH 64 #ifdef __cplusplus diff --git a/cpukit/dev/serial/sc16is752.c b/cpukit/dev/serial/sc16is752.c index 74c3ad3d7a..153b589ac1 100644 --- a/cpukit/dev/serial/sc16is752.c +++ b/cpukit/dev/serial/sc16is752.c @@ -282,6 +282,7 @@ static int sc16is752_ioctl( ) { sc16is752_context *ctx = (sc16is752_context *)base; + uint8_t regval; switch (request) { case SC16IS752_SET_SLEEP_MODE: @@ -290,6 +291,25 @@ static int sc16is752_ioctl( case SC16IS752_GET_SLEEP_MODE: *(int *)buffer = is_sleep_mode_enabled(ctx); break; + case SC16IS752_SET_IOCONTROL: + regval = (*(uint8_t *)buffer) & ~SC16IS752_IOCONTROL_SRESET; + write_reg(ctx, SC16IS752_IOCONTROL, ®val, 1); + break; + case SC16IS752_GET_IOCONTROL: + read_reg(ctx, SC16IS752_IOCONTROL, (uint8_t *)buffer, 1); + break; + case SC16IS752_SET_IODIR: + write_reg(ctx, SC16IS752_IODIR, (uint8_t *)buffer, 1); + break; + case SC16IS752_GET_IODIR: + read_reg(ctx, SC16IS752_IODIR, (uint8_t *)buffer, 1); + break; + case SC16IS752_SET_IOSTATE: + write_reg(ctx, SC16IS752_IOSTATE, (uint8_t *)buffer, 1); + break; + case SC16IS752_GET_IOSTATE: + read_reg(ctx, SC16IS752_IOSTATE, (uint8_t *)buffer, 1); + break; default: rtems_set_errno_and_return_minus_one(EINVAL); } diff --git a/cpukit/include/dev/serial/sc16is752.h b/cpukit/include/dev/serial/sc16is752.h index 7e5b47aaa2..67c2e009bc 100644 --- a/cpukit/include/dev/serial/sc16is752.h +++ b/cpukit/include/dev/serial/sc16is752.h @@ -251,10 +251,55 @@ rtems_status_code sc16is752_spi_create( #define SC16IS752_SET_SLEEP_MODE _IOW('d', 0, int) /** + * @brief Set the I/O Control bits except for the SRESET. + * + * Note that it will not be possible to set the SRESET. Otherwise the driver + * might would have an undefined state. + */ +#define SC16IS752_SET_IOCONTROL _IOW('d', 1, uint8_t) + +/** + * @brief Set the I/O pins direction register. + */ +#define SC16IS752_SET_IODIR _IOW('d', 2, uint8_t) + +/** + * @brief Set the I/O pins state register. + */ +#define SC16IS752_SET_IOSTATE _IOW('d', 3, uint8_t) + +/** * @brief Returns non-zero in case the sleep mode is enabled, otherwise zero. */ #define SC16IS752_GET_SLEEP_MODE _IOR('d', 0, int) +/** + * @brief Read the I/O Control register. + */ +#define SC16IS752_GET_IOCONTROL _IOR('d', 1, uint8_t) + +/** + * @brief Read the I/O pins direction register. + */ +#define SC16IS752_GET_IODIR _IOR('d', 2, uint8_t) + +/** + * @brief Read the I/O pins state register. + */ +#define SC16IS752_GET_IOSTATE _IOR('d', 3, uint8_t) + +/** + * @brief Bits for the IOCONTROL register. + * @{ + */ +#define SC16IS752_IOCONTROL_SRESET (1u << 3) +#define SC16IS752_IOCONTROL_GPIO_3_0_OR_MODEM (1u << 2) +#define SC16IS752_IOCONTROL_GPIO_7_4_OR_MODEM (1u << 1) +#define SC16IS752_IOCONTROL_IOLATCH (1u << 0) +/** + * @} + */ + #ifdef __cplusplus } #endif /* __cplusplus */ -- 2.13.6 _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel