Update #3254. --- c/src/lib/libbsp/sparc/erc32/include/tm27.h | 34 --------------------------- c/src/lib/libbsp/sparc/leon2/include/tm27.h | 36 +---------------------------- c/src/lib/libbsp/sparc/leon3/include/tm27.h | 36 +---------------------------- 3 files changed, 2 insertions(+), 104 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/erc32/include/tm27.h b/c/src/lib/libbsp/sparc/erc32/include/tm27.h index 958036fbf0..77024cb667 100644 --- a/c/src/lib/libbsp/sparc/erc32/include/tm27.h +++ b/c/src/lib/libbsp/sparc/erc32/include/tm27.h @@ -21,41 +21,9 @@ #define __tm27_h /* - * Define the interrupt mechanism for Time Test 27 - * - * NOTE: Since the interrupt code for the SPARC supports both synchronous - * and asynchronous trap handlers, support for testing with both - * is included. - */ - -#define ERC32_BSP_USE_SYNCHRONOUS_TRAP 0 - -/* - * The synchronous trap is an arbitrarily chosen software trap. - */ - -#if (ERC32_BSP_USE_SYNCHRONOUS_TRAP == 1) - -#define TEST_VECTOR SPARC_SYNCHRONOUS_TRAP( 0x90 ) - -#define MUST_WAIT_FOR_INTERRUPT 1 - -#define Install_tm27_vector( handler ) \ - set_vector( (handler), TEST_VECTOR, 1 ); - -#define Cause_tm27_intr() \ - __asm__ volatile( "ta 0x10; nop " ); - -#define Clear_tm27_intr() /* empty */ - -#define Lower_tm27_intr() /* empty */ - -/* * The asynchronous trap is an arbitrarily chosen ERC32 interrupt source. */ -#else /* use a regular asynchronous trap */ - #define TEST_INTERRUPT_SOURCE ERC32_INTERRUPT_EXTERNAL_1 #define TEST_INTERRUPT_SOURCE2 (ERC32_INTERRUPT_EXTERNAL_1+1) #define TEST_VECTOR ERC32_TRAP_TYPE( TEST_INTERRUPT_SOURCE ) @@ -81,5 +49,3 @@ #define Lower_tm27_intr() /* empty */ #endif - -#endif diff --git a/c/src/lib/libbsp/sparc/leon2/include/tm27.h b/c/src/lib/libbsp/sparc/leon2/include/tm27.h index 0d28641b9b..6d498c2353 100644 --- a/c/src/lib/libbsp/sparc/leon2/include/tm27.h +++ b/c/src/lib/libbsp/sparc/leon2/include/tm27.h @@ -21,41 +21,9 @@ #define __tm27_h /* - * Define the interrupt mechanism for Time Test 27 - * - * NOTE: Since the interrupt code for the SPARC supports both synchronous - * and asynchronous trap handlers, support for testing with both - * is included. - */ - -#define SIS_USE_SYNCHRONOUS_TRAP 0 - -/* - * The synchronous trap is an arbitrarily chosen software trap. - */ - -#if (SIS_USE_SYNCHRONOUS_TRAP == 1) - -#define TEST_VECTOR SPARC_SYNCHRONOUS_TRAP( 0x90 ) - -#define MUST_WAIT_FOR_INTERRUPT 1 - -#define Install_tm27_vector( handler ) \ - set_vector( (handler), TEST_VECTOR, 1 ); - -#define Cause_tm27_intr() \ - __asm__ volatile( "ta 0x10; nop " ); - -#define Clear_tm27_intr() /* empty */ - -#define Lower_tm27_intr() /* empty */ - -/* - * The asynchronous trap is an arbitrarily chosen ERC32 interrupt source. + * The asynchronous trap is an arbitrarily chosen interrupt source. */ -#else /* use a regular asynchronous trap */ - #define TEST_INTERRUPT_SOURCE LEON_INTERRUPT_EXTERNAL_1 #define TEST_VECTOR LEON_TRAP_TYPE( TEST_INTERRUPT_SOURCE ) #define TEST_INTERRUPT_SOURCE2 LEON_INTERRUPT_EXTERNAL_1+1 @@ -80,5 +48,3 @@ #define Lower_tm27_intr() /* empty */ #endif - -#endif diff --git a/c/src/lib/libbsp/sparc/leon3/include/tm27.h b/c/src/lib/libbsp/sparc/leon3/include/tm27.h index 00921d4880..db1973c2e8 100644 --- a/c/src/lib/libbsp/sparc/leon3/include/tm27.h +++ b/c/src/lib/libbsp/sparc/leon3/include/tm27.h @@ -21,41 +21,9 @@ #define __tm27_h /* - * Define the interrupt mechanism for Time Test 27 - * - * NOTE: Since the interrupt code for the SPARC supports both synchronous - * and asynchronous trap handlers, support for testing with both - * is included. - */ - -#define SIS_USE_SYNCHRONOUS_TRAP 0 - -/* - * The synchronous trap is an arbitrarily chosen software trap. - */ - -#if (SIS_USE_SYNCHRONOUS_TRAP == 1) - -#define TEST_VECTOR SPARC_SYNCHRONOUS_TRAP( 0x90 ) - -#define MUST_WAIT_FOR_INTERRUPT 1 - -#define Install_tm27_vector( handler ) \ - set_vector( (handler), TEST_VECTOR, 1 ); - -#define Cause_tm27_intr() \ - __asm__ volatile( "ta 0x10; nop " ); - -#define Clear_tm27_intr() /* empty */ - -#define Lower_tm27_intr() /* empty */ - -/* - * The asynchronous trap is an arbitrarily chosen ERC32 interrupt source. + * The asynchronous trap is an arbitrarily chosen interrupt source. */ -#else /* use a regular asynchronous trap */ - #define TEST_INTERRUPT_SOURCE LEON_INTERRUPT_EXTERNAL_1 #define TEST_VECTOR LEON_TRAP_TYPE( TEST_INTERRUPT_SOURCE ) #define TEST_INTERRUPT_SOURCE2 LEON_INTERRUPT_EXTERNAL_1+1 @@ -80,5 +48,3 @@ #define Lower_tm27_intr() /* empty */ #endif - -#endif -- 2.12.3 _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
