On 19/07/17 22:35, Jiri Gaisler wrote:
The instruction that takes the trap is at 0x40004040, which is ld [ %sp
+ 0x4c ], %f8. Remember that SPARC has deferred FPU trap model so it is
actually the previous FPU instruction FSMULD at 0x4000403c that
generated the trap. This instruction is not implemented in sis, and I am
not sure it is even implemented in some leon2/leon3 hardware. I will
check and report back ...
Jiri.
I use -mcpu=leon -mfix-at697f and according to the manual we have:
The AT697F floating-point unit is based on the MEIKO core and implements the
SPARC floating-point instruction-set defined in the SPARC Architecture Manual
version 8.
I am certain that AT697E did not implement FSMULD, whether AT697F does
it I do not know but I doubt it. On the other hand, most (all?) leon3
with an FPU does support FSMULD. Maybe somebody with an AT697F board
could run the MATHF test and report if it runs or traps. I will add
fsmuld support to sis, but we should really try to find out if it is
appropriate for leon2.
We did some tests on a real AT697F and it apparently supported the
FSMULD instruction in hardware.
--
Sebastian Huber, embedded brains GmbH
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