From: Martin Aberg <mab...@gaisler.com>
The FIFOs available capability bit is available in the UART Control Register:
FIFOs available (FA) - Set to 1 when receiver and transmitter FIFOs are
available. When 0, only holding register is available.
Delay interrupt can delay a receive character interrupt to better handle RX
bursts.
---
c/src/lib/libbsp/sparc/shared/include/apbuart.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/c/src/lib/libbsp/sparc/shared/include/apbuart.h
b/c/src/lib/libbsp/sparc/shared/include/apbuart.h
index 2f34a11..326e769 100644
--- a/c/src/lib/libbsp/sparc/shared/include/apbuart.h
+++ b/c/src/lib/libbsp/sparc/shared/include/apbuart.h
@@ -63,6 +63,9 @@ typedef struct {
#define APBUART_CTRL_EC 0x100
#define APBUART_CTRL_TF 0x200
#define APBUART_CTRL_RF 0x400
+#define APBUART_CTRL_BI 0x1000
+#define APBUART_CTRL_DI 0x2000
+#define APBUART_CTRL_FA 0x80000000
#define APBUART_STATUS_DR 0x1
#define APBUART_STATUS_TS 0x2
--
2.7.4
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