The u-boot loader can enable the MMU plus the data and instruction caches.
Disable them and if the data cache is enabled clear it before turn the caches
off.
Closes #2774.
---
c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h | 4 ++++
c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c | 2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h
b/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h
index 01fdbb3..7734ddc 100644
--- a/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h
+++ b/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h
@@ -166,6 +166,10 @@ arm_cp15_start_setup_mmu_and_cache(uint32_t ctrl_clear,
uint32_t ctrl_set)
{
uint32_t ctrl = arm_cp15_get_control();
+ if ((ctrl & ARM_CP15_CTRL_C) != 0) {
+ arm_cp15_data_cache_clean_all_levels();
+ }
+
ctrl &= ~ctrl_clear;
ctrl |= ctrl_set;
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c
b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c
index c7a1089..0918588 100644
--- a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c
+++ b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c
@@ -41,7 +41,7 @@ BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void)
__attribute__ ((weak)
BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void)
{
uint32_t ctrl = arm_cp15_start_setup_mmu_and_cache(
- ARM_CP15_CTRL_A,
+ ARM_CP15_CTRL_A | ARM_CP15_CTRL_C | ARM_CP15_CTRL_I | ARM_CP15_CTRL_M,
ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
);
--
2.4.6
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