Added macros for DMA channels 0-12
Added interrupt handlers for DMA 0, 1 & 2
The added IRQs are in accordance with the
BCM Peripherals Datasheet and also have been verified
with the linux source code for RPi
---
c/src/lib/libbsp/arm/raspberrypi/include/irq.h | 17 ++++++++++
c/src/lib/libbsp/arm/raspberrypi/irq/irq.c | 45 ++++++++++++++++++++++++++
2 files changed, 62 insertions(+)
diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/irq.h
b/c/src/lib/libbsp/arm/raspberrypi/include/irq.h
index 8436c2d..50616e1 100644
--- a/c/src/lib/libbsp/arm/raspberrypi/include/irq.h
+++ b/c/src/lib/libbsp/arm/raspberrypi/include/irq.h
@@ -35,6 +35,23 @@
#define BCM2835_INTC_TOTAL_IRQ 64 + 8
+/* DMA Interrupt is routed to IRQ 16 for DMA Channel 0,
+ IRQ 17 for Channel 1, and so on till IRQ 28 for Channel 12.
+ */
+
+#define BCM2835_IRQ_ID_DMA_CH0 16
+#define BCM2835_IRQ_ID_DMA_CH1 17
+#define BCM2835_IRQ_ID_DMA_CH2 18
+#define BCM2835_IRQ_ID_DMA_CH3 19
+#define BCM2835_IRQ_ID_DMA_CH4 20
+#define BCM2835_IRQ_ID_DMA_CH5 21
+#define BCM2835_IRQ_ID_DMA_CH6 22
+#define BCM2835_IRQ_ID_DMA_CH7 23
+#define BCM2835_IRQ_ID_DMA_CH8 24
+#define BCM2835_IRQ_ID_DMA_CH9 25
+#define BCM2835_IRQ_ID_DMA_CH10 26
+#define BCM2835_IRQ_ID_DMA_CH11 27
+#define BCM2835_IRQ_ID_DMA_CH12 28
#define BCM2835_IRQ_ID_AUX 29
#define BCM2835_IRQ_ID_SPI_SLAVE 43
diff --git a/c/src/lib/libbsp/arm/raspberrypi/irq/irq.c
b/c/src/lib/libbsp/arm/raspberrypi/irq/irq.c
index 7b3b2be..3279b35 100644
--- a/c/src/lib/libbsp/arm/raspberrypi/irq/irq.c
+++ b/c/src/lib/libbsp/arm/raspberrypi/irq/irq.c
@@ -64,6 +64,21 @@ void bsp_interrupt_dispatch(void)
{
vector = BCM2835_IRQ_ID_UART;
}
+ /* DMA 0 */
+ else if ( BCM2835_REG(BCM2835_IRQ_PENDING1) & BCM2835_BIT(16) )
+ {
+ vector = BCM2835_IRQ_ID_DMA_CH0;
+ }
+ /* DMA 1 */
+ else if ( BCM2835_REG(BCM2835_IRQ_PENDING1) & BCM2835_BIT(17) )
+ {
+ vector = BCM2835_IRQ_ID_DMA_CH1;
+ }
+ /* DMA 2 */
+ else if ( BCM2835_REG(BCM2835_IRQ_PENDING1) & BCM2835_BIT(18) )
+ {
+ vector = BCM2835_IRQ_ID_DMA_CH2;
+ }
/* GPIO 0*/
else if ( BCM2835_REG(BCM2835_IRQ_PENDING2) & BCM2835_BIT(17) )
{
@@ -114,6 +129,21 @@ rtems_status_code
bsp_interrupt_vector_enable(rtems_vector_number vector)
{
BCM2835_REG(BCM2835_IRQ_ENABLE2) = BCM2835_BIT(25);
}
+ /* DMA 0 */
+ else if ( vector == BCM2835_IRQ_ID_DMA_CH0 )
+ {
+ BCM2835_REG(BCM2835_IRQ_ENABLE1) = BCM2835_BIT(16);
+ }
+ /* DMA 1 */
+ else if ( vector == BCM2835_IRQ_ID_DMA_CH1 )
+ {
+ BCM2835_REG(BCM2835_IRQ_ENABLE1) = BCM2835_BIT(17);
+ }
+ /* DMA 2 */
+ else if ( vector == BCM2835_IRQ_ID_DMA_CH2 )
+ {
+ BCM2835_REG(BCM2835_IRQ_ENABLE1) = BCM2835_BIT(18);
+ }
/* GPIO 0 */
else if ( vector == BCM2835_IRQ_ID_GPIO_0 )
{
@@ -164,6 +194,21 @@ rtems_status_code
bsp_interrupt_vector_disable(rtems_vector_number vector)
{
BCM2835_REG(BCM2835_IRQ_DISABLE2) = BCM2835_BIT(25);
}
+ /* DMA 0 */
+ else if ( vector == BCM2835_IRQ_ID_DMA_CH0 )
+ {
+ BCM2835_REG(BCM2835_IRQ_DISABLE1) = BCM2835_BIT(16);
+ }
+ /* DMA 1 */
+ else if ( vector == BCM2835_IRQ_ID_DMA_CH1 )
+ {
+ BCM2835_REG(BCM2835_IRQ_DISABLE1) = BCM2835_BIT(17);
+ }
+ /* DMA 2 */
+ else if ( vector == BCM2835_IRQ_ID_DMA_CH2 )
+ {
+ BCM2835_REG(BCM2835_IRQ_DISABLE1) = BCM2835_BIT(18);
+ }
/* GPIO 0 */
else if ( vector == BCM2835_IRQ_ID_GPIO_0 )
{
--
1.9.1
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