Hello Martin,
On Tuesday 24 of November 2015 15:35:47 Martin Galvan wrote:
> I tested this both with and without the VFP, and in both cases I can't
> even make it to bsp_start. Even worse, Uniflash will almost fail to
> load the binaries to the board, which makes it quite cumbersome to
> perform the tests. While I may've done something wrong, the errors
> Uniflash is reporting are the exact same as the ones we used to have
> when POM was enabled by default. So there's that.
>
> For now we'll keep working with 4.11 prior to your changes. I suspect
> your issue is different than the one I'm seeing though; you may want
> to check if your loader doesn't do anything with the FP registers
> before you get to bsp_start_init_registers_vfp.
thanks for testing and I am sorry if shame is on our side.
But, please, help to find cause. Using shadow branch is
not good idea. There are many (most unrelated to TMS570)
corrections even in 4.11 branch and new problems would appear
and be solved. Backporting to shadow branch is waste
of time.
Please, what is the last version which you know to run with your
HaCoGen your patchstack?
I have done analysis of changes in TMS570 BSP which has been applied
past application of your change "TMS570: Add board reset code to bsp_reset"
in March 2015. There is link to complete (full size) set of
changes in TMS570 BSP
http://cmp.felk.cvut.cz/~pisa/tms570/tms570-150326-151125.diff.gz
The most of changes are related to header files and should not
have any influence to actual execution code path.
I am attaching filtered differences which are related to actual
execution.
The most code intrusive overall RTEMS change
bsps: Convert clock drivers to use a timecounter
by Alexander Krutwig done in April
+++ b/c/src/lib/libbsp/arm/tms570/clock/clock.c
....
It is for sure step in right direction, previous code attempt
to increase time measurement resolution by retrieving and adding
time from last tick has been nonsense which has been tried
in Linux and other operating systems and cannot be done
really well and all reasonable systems do not use it anymore.
There are some more fixes in clock.c to correct mistakes
in conversion by Premek and then there is update to reflect
new headers. But that all should be fully tested by our setup.
+++ b/c/src/lib/libbsp/arm/tms570/console/printk-support.c
only headers adaptation
+++ b/c/src/lib/libbsp/arm/tms570/console/tms570-sci.c
headers update
close deadlock loop correction
@@ -520,15 +525,19 @@ static void tms570_sci_interrupt_last_close(
{
tms570_sci_context *ctx = (tms570_sci_context *) base;
rtems_interrupt_lock_context lock_context;
+ rtems_interval tw;
+ int32_t baudrate;
/* Turn off RX interrupts */
rtems_termios_device_lock_acquire(base, &lock_context);
tms570_sci_disable_interrupts(ctx);
rtems_termios_device_lock_release(base, &lock_context);
- /* Flush device */
- while ( ( ctx->regs->SCIFLR & (1<<11) ) > 0 ) {
- ;/* Wait until all data has been sent */
+ tw = rtems_clock_get_ticks_per_second();
+ baudrate = rtems_termios_baud_to_number(cfgetospeed(&tty->termios));
+ tw = tw * 10 / baudrate + 1;
+ while ( ( ctx->regs->FLR & TMS570_SCI_FLR_TX_EMPTY ) == 0 ) {
+ rtems_task_wake_after(tw);
}
/* uninstall ISR */
+++ b/c/src/lib/libbsp/arm/tms570/irq/irq.c
added and documented interrupt bypass option
permanently disabled - so no influence to the code
sctlr &= ~(1 << 24);
+ #if 0
.....
+ sctlr |= 1 << 24;
+ #endif
asm volatile ("mcr p15, 0, %0, c1, c0, 0\n": : "r" (sctlr));
You can try to enable it then branch instruction ons satrt of
is not used for interrupt processing. VIM is configured
to pass execution to right whole system RTEMS exeption
handler _ARMV4_Exception_interrupt then. It has issues with
ETHERNET interrupts not seen in IRQINDEX. But else it is stable
and using VIM bypass is suggested by Ti support but with
direct pointing to individual handlers. There would be no
issue for ETHERNET in such case, but RTEMS schedule would not
be called right.
+++ b/c/src/lib/libbsp/arm/tms570/startup/bspreset.c
headers update - not called during initialization
So we are getting to real code changes in 4.11 TMS570 BSP
> +++ b/c/src/lib/libbsp/arm/tms570/startup/bspstart.c
> @@ -27,13 +27,49 @@
> #include <bsp/irq-generic.h>
> #include <bsp/start.h>
> #include <bsp/bootcard.h>
> +#include <bsp/linker-symbols.h>
> +#include <rtems/endian.h>
>
> void bsp_start( void )
> {
> - /* set the cpu mode to supervisor and big endian */
> - arm_cpu_mode = 0x213;
> + #if BYTE_ORDER == BIG_ENDIAN
> + /*
> + * If CPU is big endian (TMS570 family variant)
> + * set the CPU mode to supervisor and big endian.
> + * Do not set mode if CPU is little endian
> + * (RM48 family variant) for which default mode 0x13
> + * defined in cpukit/score/cpu/arm/cpu.c
> + * is right.
> + */
> + arm_cpu_mode = 0x213;
check that your tools do endian selection right, put there some error
and check it during compilation that condition is true
> + #endif
>
> - tms570_pom_remap();
> + tms570_initialize_and_clear();
The code has been there with unconditional POM map which
has is not required in your case. Previous code has been
known to not work reliably. Code changed to initialization
and cleanup only.
But delete this line to be sure that it is not problem cause
> + /*
> + * If RTEMS image does not start at address 0x00000000
> + * then first level exception table at memory begin has
> + * to be replaced to point to RTEMS handlers addresses.
> + *
> + * There is no VBAR or other option because Cortex-R
> + * does provides only fixed address 0x00000000 for exceptions
> + * (0xFFFF0000-0xFFFF001C alternative SCTLR.V = 1 cannot
> + * be used because target area corersponds to PMM peripheral
> + * registers on TMS570).
> + *
> + * Alternative is to use jumps over SRAM based trampolines
> + * but that is not compatible with
> + * Check TCRAM1 ECC error detection logic
> + * which intentionally introduces data abort during startup
> + * to check SRAM and if exception processing goes through
> + * SRAM then it leads to CPU error halt.
> + *
> + * So use of POM to replace jumps to vectors target
> + * addresses seems to be the best option.
> + */
> + if ( (uintptr_t)bsp_start_vector_table_begin != 0 ) {
> + tms570_pom_remap();
> + }
if condition is right then function should not be called for your
case. Delete lines to be sure that this is not cause of problems.
> /* Interrupts */
> bsp_interrupt_initialize();
There are more changes in POM support code but if above functions
are not called then it would not be even linked in.
What is left is move of VFP enable from your Flash only case to
filer for all varinats
b/c/src/lib/libbsp/arm/tms570/make/custom/tms570ls3137.inc
CPU_CFLAGS = -march=armv7-r -mthumb -mbig-endian -mfpu=vfpv3-d16
-mfloat-abi=hard
So this cause should be checked by changing back to
CPU_CFLAGS = -march=armv7-r -mthumb -mbig-endian
And last thing is our reserve of 256 bytes on start of internal SRAM.
It can be reverted
diff --git a/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk
b/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk
index 5ecd4ed..a32562f 100644
--- a/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk
+++ b/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk
@@ -1,7 +1,8 @@
MEMORY {
ROM_INT (RX) : ORIGIN = 0x00000000, LENGTH = 3M
- RAM_INT (AIW) : ORIGIN = 0x08000000, LENGTH = 256k
+ RAM_INT_VEC : ORIGIN = 0x08000000, LENGTH = 256
+ RAM_INT (AIWX) : ORIGIN = 0x08000100, LENGTH = 256k - 256
RAM_EXT (AIWX) : ORIGIN = 0x80000000, LENGTH = 8M
}
@@ -26,4 +27,6 @@ REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM_INT);
bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size :
1024;
bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align);
+bsp_int_vec_overlay_start = ORIGIN(RAM_INT_VEC);
+
INCLUDE linkcmds.armv4
If undo/disable of above changes does not help then the problem
is most probably some change unrelated to the BSP
and it very desirable to catch it early because it would take
more time to find it later.
I have started work on preparation of HalCoGen RTEMS mix to test
application starting from address 0 ourselves. I am not happy
that I have to sacrifice my time for this because setup
without loader is not too much interresting to us and I do not
consider this mix to be allowed into RTEMS mainline. But if I
find time we provide that setup in public branch on GitHub.
Best wishes,
Pavel
diff --git a/c/src/lib/libbsp/arm/tms570/bsp_specs b/c/src/lib/libbsp/arm/tms570/bsp_specs
index 1afa2ba..86af12f 100644
--- a/c/src/lib/libbsp/arm/tms570/bsp_specs
+++ b/c/src/lib/libbsp/arm/tms570/bsp_specs
@@ -10,4 +10,4 @@
%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N -EB }
*endfile:
-%{!qrtems: *(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s }
+%{!qrtems: %(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s }
diff --git a/c/src/lib/libbsp/arm/tms570/clock/clock.c b/c/src/lib/libbsp/arm/tms570/clock/clock.c
index 4dba949..45da093 100644
--- a/c/src/lib/libbsp/arm/tms570/clock/clock.c
+++ b/c/src/lib/libbsp/arm/tms570/clock/clock.c
@@ -30,13 +30,25 @@
#include <bsp/irq.h>
#include <bsp/tms570-rti.h>
#include <rtems/counter.h>
+#include <rtems/timecounter.h>
-/**
- * holds HW counter value since last interrupt event
- * sets in tms570_clock_driver_support_at_tick
- * used in tms570_clock_driver_nanoseconds_since_last_tick
+static struct timecounter tms570_rti_tc;
+
+static uint32_t tms570_rti_get_timecount(struct timecounter *tc)
+{
+ return TMS570_RTI.CNT[0].FRCx;
+}
+
+#ifndef TMS570_PREFERRED_TC_FREQUENCY
+/*
+ * Define preferred main time base counter frequency
+ * The value of 1MHz is the best matching RTEMS
+ * timing system because then there is no need
+ * to scale RTEMS configuration microseconds_per_tick
+ * parameter
*/
-static uint32_t tms570_rti_last_tick_fcr0;
+#define TMS570_PREFERRED_TC_FREQUENCY 1000000
+#endif /* TMS570_PREFERRED_TC_FREQUENCY */
/**
* @brief Initialize the HW peripheral for clock driver
@@ -48,30 +60,70 @@ static uint32_t tms570_rti_last_tick_fcr0;
static void tms570_clock_driver_support_initialize_hardware( void )
{
- uint32_t microsec_per_tick = rtems_configuration_get_microseconds_per_tick();
+ uint32_t microsec_per_tick;
+ uint32_t tc_frequency;
+ uint32_t tc_prescaler;
+ uint32_t tc_increments_per_tick;
+
+ microsec_per_tick = rtems_configuration_get_microseconds_per_tick();
+ tc_frequency = TMS570_PREFERRED_TC_FREQUENCY;
rtems_counter_initialize_converter(BSP_PLL_OUT_CLOCK);
+ tc_prescaler = (BSP_PLL_OUT_CLOCK + tc_frequency) / (tc_frequency * 2);
+
+ /* Recompute actual most close frequency which can be realized */
+ tc_frequency = (BSP_PLL_OUT_CLOCK + tc_prescaler) / (tc_prescaler * 2);
+
+ /*
+ * Recompute tick period to adjust for configurable or exact
+ * preferred time base 1 usec resolution.
+ */
+ tc_increments_per_tick = ((uint64_t)microsec_per_tick * tc_frequency +
+ 500000) / 1000000;
+
/* Hardware specific initialize */
- TMS570_RTI.RTIGCTRL = 0;
- TMS570_RTI.RTICPUC0 = BSP_PLL_OUT_CLOCK /1000000 / 2; /* prescaler */
- TMS570_RTI.RTITBCTRL = 2;
- TMS570_RTI.RTICAPCTRL = 0;
- TMS570_RTI.RTICOMPCTRL = 0;
+ TMS570_RTI.GCTRL = 0;
+ TMS570_RTI.CNT[0].CPUCx = tc_prescaler - 1;
+ TMS570_RTI.TBCTRL = TMS570_RTI_TBCTRL_INC;
+ TMS570_RTI.CAPCTRL = 0;
+ TMS570_RTI.COMPCTRL = 0;
/* set counter to zero */
- TMS570_RTI.RTIUC0 = 0;
- TMS570_RTI.RTIFRC0 = 0;
+ TMS570_RTI.CNT[0].UCx = 0;
+ TMS570_RTI.CNT[0].FRCx = 0;
/* clear interrupts*/
- TMS570_RTI.RTICLEARINTENA = 0x00070f0f;
- TMS570_RTI.RTIINTFLAG = 0x0007000f;
+ TMS570_RTI.CLEARINTENA = TMS570_RTI_CLEARINTENA_CLEAROVL1INT |
+ TMS570_RTI_CLEARINTENA_CLEAROVL0INT |
+ TMS570_RTI_CLEARINTENA_CLEARTBINT |
+ TMS570_RTI_CLEARINTENA_CLEARDMA3 |
+ TMS570_RTI_CLEARINTENA_CLEARDMA2 |
+ TMS570_RTI_CLEARINTENA_CLEARDMA1 |
+ TMS570_RTI_CLEARINTENA_CLEARDMA0 |
+ TMS570_RTI_CLEARINTENA_CLEARINT3 |
+ TMS570_RTI_CLEARINTENA_CLEARINT2 |
+ TMS570_RTI_CLEARINTENA_CLEARINT1 |
+ TMS570_RTI_CLEARINTENA_CLEARINT0;
+ TMS570_RTI.INTFLAG = TMS570_RTI_INTFLAG_OVL1INT |
+ TMS570_RTI_INTFLAG_OVL0INT |
+ TMS570_RTI_INTFLAG_TBINT |
+ TMS570_RTI_INTFLAG_INT3 |
+ TMS570_RTI_INTFLAG_INT2 |
+ TMS570_RTI_INTFLAG_INT1 |
+ TMS570_RTI_INTFLAG_INT0;
/* set timer */
- TMS570_RTI.RTICOMP0 = TMS570_RTI.RTIFRC0 + microsec_per_tick;
- TMS570_RTI.RTICOMP0CLR = TMS570_RTI.RTICOMP0 + microsec_per_tick / 2;
- TMS570_RTI.RTIUDCP0 = microsec_per_tick;
+ TMS570_RTI.CMP[0].COMPx = TMS570_RTI.CNT[0].FRCx + tc_increments_per_tick;
+ TMS570_RTI.COMP0CLR = TMS570_RTI.CMP[0].COMPx + tc_increments_per_tick / 2;
+ TMS570_RTI.CMP[0].UDCPx = tc_increments_per_tick;
/* enable interupt */
- TMS570_RTI.RTISETINTENA = 0x1;
+ TMS570_RTI.SETINTENA = TMS570_RTI_SETINTENA_SETINT0;
/* enable timer */
- TMS570_RTI.RTIGCTRL = 1;
+ TMS570_RTI.GCTRL = TMS570_RTI_GCTRL_CNT0EN;
+ /* set timecounter */
+ tms570_rti_tc.tc_get_timecount = tms570_rti_get_timecount;
+ tms570_rti_tc.tc_counter_mask = 0xffffffff;
+ tms570_rti_tc.tc_frequency = tc_frequency;
+ tms570_rti_tc.tc_quality = RTEMS_TIMECOUNTER_QUALITY_CLOCK_DRIVER;
+ rtems_timecounter_install(&tms570_rti_tc);
}
/**
@@ -81,8 +133,7 @@ static void tms570_clock_driver_support_initialize_hardware( void )
*/
static void tms570_clock_driver_support_at_tick( void )
{
- TMS570_RTI.RTIINTFLAG = 0x00000001;
- tms570_rti_last_tick_fcr0 = TMS570_RTI.RTICOMP0 - TMS570_RTI.RTIUDCP0;
+ TMS570_RTI.INTFLAG = TMS570_RTI_INTFLAG_INT0;
}
/**
@@ -121,25 +172,8 @@ static void tms570_clock_driver_support_install_isr(
static void tms570_clock_driver_support_shutdown_hardware( void )
{
/* turn off the timer interrupts */
- TMS570_RTI.RTICLEARINTENA = 0x20000;
-}
-
-/**
- * @brief returns the nanoseconds since last tick
- *
- * Return the nanoseconds since last tick
- *
- * @retval x nanoseconds
- *
- */
-static uint32_t tms570_clock_driver_nanoseconds_since_last_tick( void )
-{
- uint32_t actual_fcr0 = TMS570_RTI.RTIFRC0;
- uint32_t usec_since_tick;
-
- usec_since_tick = actual_fcr0 - tms570_rti_last_tick_fcr0;
-
- return usec_since_tick * 1000;
+ TMS570_RTI.CLEARINTENA = TMS570_RTI_CLEARINTENA_CLEAROVL0INT |
+ TMS570_RTI_CLEARINTENA_CLEARINT0;
}
#define Clock_driver_support_initialize_hardware \
@@ -150,8 +184,6 @@ static uint32_t tms570_clock_driver_nanoseconds_since_last_tick( void )
tms570_clock_driver_support_initialize_hardware
#define Clock_driver_support_shutdown_hardware \
tms570_clock_driver_support_shutdown_hardware
-#define Clock_driver_nanoseconds_since_last_tick \
- tms570_clock_driver_nanoseconds_since_last_tick
#define Clock_driver_support_install_isr(Clock_isr, Old_ticker ) \
tms570_clock_driver_support_install_isr( Clock_isr )
diff --git a/c/src/lib/libbsp/arm/tms570/console/printk-support.c b/c/src/lib/libbsp/arm/tms570/console/printk-support.c
index 241ca9b..77e4f1a 100644
--- a/c/src/lib/libbsp/arm/tms570/console/printk-support.c
+++ b/c/src/lib/libbsp/arm/tms570/console/printk-support.c
@@ -41,10 +41,10 @@ static void tms570_putc(char ch)
rtems_interrupt_level level;
rtems_interrupt_disable(level);
- while ( ( driver_context_table[0].regs->SCIFLR & 0x100 ) == 0) {
+ while ( ( driver_context_table[0].regs->FLR & TMS570_SCI_FLR_TXRDY ) == 0) {
rtems_interrupt_flash(level);
}
- driver_context_table[0].regs->SCITD = ch;
+ driver_context_table[0].regs->TD = ch;
rtems_interrupt_enable(level);
}
@@ -74,8 +74,8 @@ static void tms570_uart_output(char c)
*/
static int tms570_uart_input( void )
{
- if ( driver_context_table[0].regs->SCIFLR & (1<<9) ) {
- return driver_context_table[0].regs->SCIRD;
+ if ( driver_context_table[0].regs->FLR & TMS570_SCI_FLR_RXRDY ) {
+ return driver_context_table[0].regs->RD;
} else {
return -1;
}
diff --git a/c/src/lib/libbsp/arm/tms570/console/tms570-sci.c b/c/src/lib/libbsp/arm/tms570/console/tms570-sci.c
index d78cf20..fac258d 100644
--- a/c/src/lib/libbsp/arm/tms570/console/tms570-sci.c
+++ b/c/src/lib/libbsp/arm/tms570/console/tms570-sci.c
@@ -44,13 +44,16 @@ tms570_sci_context driver_context_table[] = {
{
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("TMS570 SCI1"),
.device_name = "/dev/console",
- .regs = &TMS570_SCI,
+ /* TMS570 UART peripheral use subset of LIN registers which are equivalent
+ * to SCI ones
+ */
+ .regs = (volatile tms570_sci_t *) &TMS570_LIN,
.irq = TMS570_IRQ_SCI_LEVEL_0,
},
{
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("TMS570 SCI2"),
.device_name = "/dev/ttyS1",
- .regs = &TMS570_SCI2,
+ .regs = &TMS570_SCI,
.irq = TMS570_IRQ_SCI2_LEVEL_0,
}
};
@@ -134,8 +137,8 @@ static int tms570_sci_read_received_chars(
if ( N < 1 ) {
return 0;
}
- if ( ctx->regs->SCIRD != 0 ) {
- buf[0] = ctx->regs->SCIRD;
+ if ( ctx->regs->RD != 0 ) {
+ buf[0] = ctx->regs->RD;
return 1;
}
return 0;
@@ -152,7 +155,7 @@ static int tms570_sci_read_received_chars(
*/
static void tms570_sci_enable_interrupts(tms570_sci_context * ctx)
{
- ctx->regs->SCISETINT = (1<<9);
+ ctx->regs->SETINT = TMS570_SCI_SETINT_SET_RX_INT;
}
/**
@@ -166,7 +169,7 @@ static void tms570_sci_enable_interrupts(tms570_sci_context * ctx)
*/
static void tms570_sci_disable_interrupts(tms570_sci_context * ctx)
{
- ctx->regs->SCICLEARINT = (1<<9);
+ ctx->regs->CLEARINT = TMS570_SCI_CLEARINT_CLR_RX_INT;
}
/**
@@ -213,29 +216,30 @@ static bool tms570_sci_set_attributes(
rtems_termios_device_lock_acquire(base, &lock_context);
- ctx->regs->SCIGCR1 &= ~( (1<<7) | (1<<25) | (1<<24) );
+ ctx->regs->GCR1 &= ~( TMS570_SCI_GCR1_SWnRST | TMS570_SCI_GCR1_TXENA |
+ TMS570_SCI_GCR1_RXENA );
- ctx->regs->SCIGCR1 &= ~(1<<4); /*one stop bit*/
- ctx->regs->SCIFORMAT = 0x7;
+ ctx->regs->GCR1 &= ~TMS570_SCI_GCR1_STOP; /*one stop bit*/
+ ctx->regs->FORMAT = TMS570_SCI_FORMAT_CHAR(0x7);
switch ( t->c_cflag & ( PARENB|PARODD ) ) {
case ( PARENB|PARODD ):
/* Odd parity */
- ctx->regs->SCIGCR1 &= ~(1<<3);
- ctx->regs->SCIGCR1 |= (1<<2);
+ ctx->regs->GCR1 &= ~TMS570_SCI_GCR1_PARITY;
+ ctx->regs->GCR1 |= TMS570_SCI_GCR1_PARITY_ENA;
break;
case PARENB:
/* Even parity */
- ctx->regs->SCIGCR1 |= (1<<3);
- ctx->regs->SCIGCR1 |= (1<<2);
+ ctx->regs->GCR1 |= TMS570_SCI_GCR1_PARITY;
+ ctx->regs->GCR1 |= TMS570_SCI_GCR1_PARITY_ENA;
break;
default:
case 0:
case PARODD:
/* No Parity */
- ctx->regs->SCIGCR1 &= ~(1<<2);
+ ctx->regs->GCR1 &= ~TMS570_SCI_GCR1_PARITY_ENA;
}
/* Baud rate */
@@ -244,7 +248,8 @@ static bool tms570_sci_set_attributes(
bauddiv = (BSP_PLL_OUT_CLOCK + baudrate / 2) / baudrate;
ctx->regs->BRS = bauddiv;
- ctx->regs->SCIGCR1 |= (1<<7) | (1<<25) | (1<<24);
+ ctx->regs->GCR1 |= TMS570_SCI_GCR1_SWnRST | TMS570_SCI_GCR1_TXENA |
+ TMS570_SCI_GCR1_RXENA;
rtems_termios_device_lock_release(base, &lock_context);
@@ -271,7 +276,7 @@ static void tms570_sci_interrupt_handler(void * arg)
/*
* Check if we have received something.
*/
- if ( (ctx->regs->SCIFLR & (1<<9) ) == (1<<9) ) {
+ if ( (ctx->regs->FLR & TMS570_SCI_FLR_RXRDY ) == TMS570_SCI_FLR_RXRDY ) {
n = tms570_sci_read_received_chars(ctx, buf, TMS570_SCI_BUFFER_SIZE);
if ( n > 0 ) {
/* Hand the data over to the Termios infrastructure */
@@ -281,7 +286,7 @@ static void tms570_sci_interrupt_handler(void * arg)
/*
* Check if we have something transmitted.
*/
- if ( (ctx->regs->SCIFLR & (1<<8) ) == (1<<8) ) {
+ if ( (ctx->regs->FLR & TMS570_SCI_FLR_TXRDY ) == TMS570_SCI_FLR_TXRDY ) {
n = tms570_sci_transmitted_chars(ctx);
if ( n > 0 ) {
/*
@@ -316,15 +321,15 @@ static void tms570_sci_interrupt_write(
if ( len > 0 ) {
/* start UART TX, this will result in an interrupt when done */
- ctx->regs->SCITD = *buf;
+ ctx->regs->TD = *buf;
/* character written - raise count*/
ctx->tx_chars_in_hw = 1;
/* Enable TX interrupt (interrupt is edge-triggered) */
- ctx->regs->SCISETINT = (1<<8);
+ ctx->regs->SETINT = (1<<8);
} else {
/* No more to send, disable TX interrupts */
- ctx->regs->SCICLEARINT = (1<<8);
+ ctx->regs->CLEARINT = (1<<8);
/* Tell close that we sent everything */
}
}
@@ -352,10 +357,10 @@ static void tms570_sci_poll_write(
/* Write */
for ( i = 0; i < n; ++i ) {
- while ( (ctx->regs->SCIFLR & (1<<11) ) == 0) {
+ while ( (ctx->regs->FLR & TMS570_SCI_FLR_TX_EMPTY ) == 0) {
;
}
- ctx->regs->SCITD = buf[i];
+ ctx->regs->TD = buf[i];
}
}
@@ -372,7 +377,7 @@ static int TMS570_sci_can_read_char(
tms570_sci_context * ctx
)
{
- return ctx->regs->SCIFLR & (1<<9);
+ return ctx->regs->FLR & TMS570_SCI_FLR_RXRDY;
}
/**
@@ -387,7 +392,7 @@ static char TMS570_sci_read_char(
tms570_sci_context * ctx
)
{
- return ctx->regs->SCIRD;
+ return ctx->regs->RD;
}
/**
@@ -468,7 +473,7 @@ static bool tms570_sci_interrupt_first_open(
if ( ret == false ) {
return false;
}
- ctx->regs->SCISETINTLVL = 0;
+ ctx->regs->SETINTLVL = 0;
/* Register Interrupt handler */
sc = rtems_interrupt_handler_install(ctx->irq,
ctx->device_name,
@@ -520,15 +525,19 @@ static void tms570_sci_interrupt_last_close(
{
tms570_sci_context *ctx = (tms570_sci_context *) base;
rtems_interrupt_lock_context lock_context;
+ rtems_interval tw;
+ int32_t baudrate;
/* Turn off RX interrupts */
rtems_termios_device_lock_acquire(base, &lock_context);
tms570_sci_disable_interrupts(ctx);
rtems_termios_device_lock_release(base, &lock_context);
- /* Flush device */
- while ( ( ctx->regs->SCIFLR & (1<<11) ) > 0 ) {
- ;/* Wait until all data has been sent */
+ tw = rtems_clock_get_ticks_per_second();
+ baudrate = rtems_termios_baud_to_number(cfgetospeed(&tty->termios));
+ tw = tw * 10 / baudrate + 1;
+ while ( ( ctx->regs->FLR & TMS570_SCI_FLR_TX_EMPTY ) == 0 ) {
+ rtems_task_wake_after(tw);
}
/* uninstall ISR */
diff --git a/c/src/lib/libbsp/arm/tms570/include/irq.h b/c/src/lib/libbsp/arm/tms570/include/irq.h
index f35e7fe..2952582 100644
diff --git a/c/src/lib/libbsp/arm/tms570/include/system-clocks.h b/c/src/lib/libbsp/arm/tms570/include/system-clocks.h
index d441ec4..0e1d130 100644
--- a/c/src/lib/libbsp/arm/tms570/include/system-clocks.h
+++ b/c/src/lib/libbsp/arm/tms570/include/system-clocks.h
@@ -49,7 +49,7 @@ extern "C" {
*/
static inline unsigned tms570_timer(void)
{
- uint32_t actual_fcr0 = TMS570_RTI.RTIFRC0;
+ uint32_t actual_fcr0 = TMS570_RTI.CNT[0].FRCx;
return actual_fcr0;
}
diff --git a/c/src/lib/libbsp/arm/tms570/irq/irq.c b/c/src/lib/libbsp/arm/tms570/irq/irq.c
index 2e6e3db..7a2a55f 100644
--- a/c/src/lib/libbsp/arm/tms570/irq/irq.c
+++ b/c/src/lib/libbsp/arm/tms570/irq/irq.c
@@ -201,6 +201,29 @@ rtems_status_code bsp_interrupt_facility_initialize(void)
* can be provided by VIM hardware
*/
sctlr &= ~(1 << 24);
+ #if 0
+ /*
+ * Option to enable exception table bypass for interrupts
+ *
+ * Because RTEMS requires all interrupts to be serviced through
+ * common _ARMV4_Exception_interrupt handler to allow task switching
+ * on exit from interrupt working correctly, vim_vec cannot point
+ * directly to individual vector handlers and need to point
+ * to single entry path. But if TMS570_VIM.IRQINDEX is then used
+ * to target execution to corresponding service then for some
+ * peripherals (i.e. EMAC) interrupt is already acknowledged
+ * by VIM and IRQINDEX is read as zero which leads to spurious
+ * interrupt and peripheral not serviced/blocked.
+ *
+ * To analyze this behavior we used trampolines which setup
+ * bsp_interrupt_vector_inject and pass execution to
+ * _ARMV4_Exception_interrupt. It works but is more ugly than
+ * use of POM remap for these cases where application does not
+ * start at address 0x00000000. If RTEMS image is placed at
+ * memory space beginning then no of these constructs is necessary.
+ */
+ sctlr |= 1 << 24;
+ #endif
asm volatile ("mcr p15, 0, %0, c1, c0, 0\n": : "r" (sctlr));
return RTEMS_SUCCESSFUL;
diff --git a/c/src/lib/libbsp/arm/tms570/make/custom/tms570ls3137.inc b/c/src/lib/libbsp/arm/tms570/make/custom/tms570ls3137.inc
new file mode 100644
index 0000000..869cf71
--- /dev/null
+++ b/c/src/lib/libbsp/arm/tms570/make/custom/tms570ls3137.inc
@@ -0,0 +1,20 @@
+#
+# Config file for TMS570LS3137 board.
+#
+
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = arm
+
+CPU_CFLAGS = -march=armv7-r -mthumb -mbig-endian -mfpu=vfpv3-d16 -mfloat-abi=hard
+
+CFLAGS_OPTIMIZE_V = -O2 -ggdb
+BINEXT?=.bin
+
+# This defines the operations performed on the linked executable.
+# is currently required.
+define bsp-post-link
+ $(OBJCOPY) -O binary --strip-all \
+ $(basename $@)$(EXEEXT) $(basename $@)$(BINEXT)
+ $(SIZE) $(basename $@)$(EXEEXT)
+endef
diff --git a/c/src/lib/libbsp/arm/tms570/make/custom/tms570ls3137_hdk.cfg b/c/src/lib/libbsp/arm/tms570/make/custom/tms570ls3137_hdk.cfg
index 869cf71..d769895 100644
--- a/c/src/lib/libbsp/arm/tms570/make/custom/tms570ls3137_hdk.cfg
+++ b/c/src/lib/libbsp/arm/tms570/make/custom/tms570ls3137_hdk.cfg
@@ -2,19 +2,4 @@
# Config file for TMS570LS3137 board.
#
-include $(RTEMS_ROOT)/make/custom/default.cfg
-
-RTEMS_CPU = arm
-
-CPU_CFLAGS = -march=armv7-r -mthumb -mbig-endian -mfpu=vfpv3-d16 -mfloat-abi=hard
-
-CFLAGS_OPTIMIZE_V = -O2 -ggdb
-BINEXT?=.bin
-
-# This defines the operations performed on the linked executable.
-# is currently required.
-define bsp-post-link
- $(OBJCOPY) -O binary --strip-all \
- $(basename $@)$(EXEEXT) $(basename $@)$(BINEXT)
- $(SIZE) $(basename $@)$(EXEEXT)
-endef
+include $(RTEMS_ROOT)/make/custom/tms570ls3137.inc
diff --git a/c/src/lib/libbsp/arm/tms570/startup/bspreset.c b/c/src/lib/libbsp/arm/tms570/startup/bspreset.c
index a4b6647..f6bdee2 100644
--- a/c/src/lib/libbsp/arm/tms570/startup/bspreset.c
+++ b/c/src/lib/libbsp/arm/tms570/startup/bspreset.c
@@ -17,29 +17,31 @@
*/
#include <bsp.h>
+#include <bsp/bootcard.h>
#include <bsp/tms570.h>
#include <bsp/start.h>
static void handle_esm_errors(uint32_t esm_irq_channel)
{
- /* ESMR3 errors don't generate interrupts. */
- if (esm_irq_channel < 0x20u) {
- ESMSR1 = 1 << esm_irq_channel;
- } else if (esm_irq_channel < 0x40u) {
- ESMSR2 = 1 << (esm_irq_channel - 32u);
- } else if (esm_irq_channel < 0x60u) {
- ESMSR4 = 1 << (esm_irq_channel - 64u);
- }
+ /* ESMR3 errors don't generate interrupts. */
+ if (esm_irq_channel < 0x20u) {
+ TMS570_ESM.SR[0] = 1 << esm_irq_channel;
+ } else if (esm_irq_channel < 0x40u) {
+ TMS570_ESM.SR[1] = 1 << (esm_irq_channel - 32u);
+ } else if (esm_irq_channel < 0x60u) {
+ TMS570_ESM.SR4 = 1 << (esm_irq_channel - 64u);
+ }
}
void bsp_reset(void)
{
- uint32_t esm_irq_channel = ESMIOFFHR - 1;
+ uint32_t esm_irq_channel = TMS570_ESM.IOFFHR - 1;
- if (esm_irq_channel) {
- handle_esm_errors(esm_irq_channel);
- }
+ if (esm_irq_channel) {
+ handle_esm_errors(esm_irq_channel);
+ }
- /* Reset the board */
- SYSECR = SYSECR_RESET;
+ /* Reset the board */
+ /* write of value other than 1 cause system reset */
+ TMS570_SYS1.SYSECR = TMS570_SYS1_SYSECR_RESET(2);
}
diff --git a/c/src/lib/libbsp/arm/tms570/startup/bspstart.c b/c/src/lib/libbsp/arm/tms570/startup/bspstart.c
index 31ad1e7..b7e2b62 100644
--- a/c/src/lib/libbsp/arm/tms570/startup/bspstart.c
+++ b/c/src/lib/libbsp/arm/tms570/startup/bspstart.c
@@ -27,13 +27,49 @@
#include <bsp/irq-generic.h>
#include <bsp/start.h>
#include <bsp/bootcard.h>
+#include <bsp/linker-symbols.h>
+#include <rtems/endian.h>
void bsp_start( void )
{
- /* set the cpu mode to supervisor and big endian */
- arm_cpu_mode = 0x213;
+ #if BYTE_ORDER == BIG_ENDIAN
+ /*
+ * If CPU is big endian (TMS570 family variant)
+ * set the CPU mode to supervisor and big endian.
+ * Do not set mode if CPU is little endian
+ * (RM48 family variant) for which default mode 0x13
+ * defined in cpukit/score/cpu/arm/cpu.c
+ * is right.
+ */
+ arm_cpu_mode = 0x213;
+ #endif
- tms570_pom_remap();
+ tms570_initialize_and_clear();
+
+ /*
+ * If RTEMS image does not start at address 0x00000000
+ * then first level exception table at memory begin has
+ * to be replaced to point to RTEMS handlers addresses.
+ *
+ * There is no VBAR or other option because Cortex-R
+ * does provides only fixed address 0x00000000 for exceptions
+ * (0xFFFF0000-0xFFFF001C alternative SCTLR.V = 1 cannot
+ * be used because target area corersponds to PMM peripheral
+ * registers on TMS570).
+ *
+ * Alternative is to use jumps over SRAM based trampolines
+ * but that is not compatible with
+ * Check TCRAM1 ECC error detection logic
+ * which intentionally introduces data abort during startup
+ * to check SRAM and if exception processing goes through
+ * SRAM then it leads to CPU error halt.
+ *
+ * So use of POM to replace jumps to vectors target
+ * addresses seems to be the best option.
+ */
+ if ( (uintptr_t)bsp_start_vector_table_begin != 0 ) {
+ tms570_pom_remap();
+ }
/* Interrupts */
bsp_interrupt_initialize();
diff --git a/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk b/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk
index 5ecd4ed..a32562f 100644
--- a/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk
+++ b/c/src/lib/libbsp/arm/tms570/startup/linkcmds.tms570ls3137_hdk
@@ -1,7 +1,8 @@
MEMORY {
ROM_INT (RX) : ORIGIN = 0x00000000, LENGTH = 3M
- RAM_INT (AIW) : ORIGIN = 0x08000000, LENGTH = 256k
+ RAM_INT_VEC : ORIGIN = 0x08000000, LENGTH = 256
+ RAM_INT (AIWX) : ORIGIN = 0x08000100, LENGTH = 256k - 256
RAM_EXT (AIWX) : ORIGIN = 0x80000000, LENGTH = 8M
}
@@ -26,4 +27,6 @@ REGION_ALIAS ("REGION_NOCACHE_LOAD", RAM_INT);
bsp_stack_main_size = DEFINED (bsp_stack_main_size) ? bsp_stack_main_size : 1024;
bsp_stack_main_size = ALIGN (bsp_stack_main_size, bsp_stack_align);
+bsp_int_vec_overlay_start = ORIGIN(RAM_INT_VEC);
+
INCLUDE linkcmds.armv4
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