On October 28, 2015 2:52:34 PM EDT, Jay Doyle <jay.do...@vecna.com> wrote: >All, > >We are having problems passing the RTEMS sp37 test case using our >STM32F7x BSP. I did some digging around it looks like the problem >stems >from the fact that test_interrupt_body calls rtems_interrupt_disable >twice and the function returns with most interrupts still disabled. >Later in the test, a timer is used which requires the system tick >interrupt to fire which never happens because its interrupt is still >disabled. > >Am I missing something? Presumably this test case would fail for any >ARMV7M core since the implementation of the arm interrupt functions are > >generic for all ARMV7M cores and not specific to our BSP.
If this the code sequence starting around line 440, it looks like this code was reworked during SMP development and is missing a second enable. It will require two level variables as best I can tell. This needs to be a ticket because it impacts 4.11 as well. Assuming someone confirms my analysis. >Below is an annotated copy of the step in test_interrupt_body > >// sets basepri to 0x80 and returns previous level of 0 >level = rtems_interrupt_disable() > >// sets basepri to 0x80 and returns previous level of 0x80 >level = rtems_interrupt_disable() > >// temporary sets basepri to 0x80 -- which does nothing because it is >already 0x80 >rtems_interrupt_flash( level ); > >// since level is equal to 0x80 this sets basepri to 0x80 >rtems_interrupt_enable( level ) >. >. >. >function exits with basepri still set to 0x80 instead of 0x0 > >_______________________________________________ >devel mailing list >devel@rtems.org >http://lists.rtems.org/mailman/listinfo/devel --joel _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
