On August 8, 2015 3:17:01 PM CDT, Rohini Kulkarni <krohini1...@gmail.com> wrote: >Can mailboxes be useful here? Nothing else that is coming to my mind >
They may be and I am seeing references to ARM's own mpcore which uses the GIC. This appears to be SOC specific but ARM has recommendations which may be followed by the SOC manufacturer >On Sun, Aug 9, 2015 at 1:44 AM, Rohini Kulkarni <krohini1...@gmail.com> >wrote: > >Hi, > >I am stuck at how to set up IPI for Pi 2. This is a document I have >referred to get an idea of interrupts. Would be great to get some help >on how to proceed. > > >On Fri, Jul 31, 2015 at 7:33 PM, Joel Sherrill ><joel.sherr...@oarcorp.com> wrote: > > > >On 7/31/2015 8:11 AM, Rohini Kulkarni wrote: > >Hi, > >How is the number of processors to be used for an application >specified? >The used count minimum of that supported in hardware and that >configured. How to specify the latter? > > >https://docs.rtems.org/doc-current/share/rtems/html/c_user/Configuring-a-System-SMP-Specific-Configuration-Parameters.html#Configuring-a-System-SMP-Specific-Configuration-Parameters > >and see the smptests. Many of which do specify the maximum. > >Thanks. > >On 29 Jul 2015 15:29, "Sebastian Huber" ><sebastian.hu...@embedded-brains.de ><mailto:sebastian.hu...@embedded-brains.de>> wrote: > > > > On 29/07/15 11:52, Rohini Kulkarni wrote: > > > >On Tue, Jul 28, 2015 at 12:24 PM, Sebastian Huber ><sebastian.hu...@embedded-brains.de ><mailto:sebastian.hu...@embedded-brains.de> ><mailto:sebastian.hu...@embedded-brains.de ><mailto:sebastian.hu...@embedded-brains.de>>> wrote: > > Hello Rohini, > > please use the devel list. > > On 28/07/15 07:41, Rohini Kulkarni wrote: > > Hi, > > I wish to understand where the interprocessor interrupts are > used during the boot process. During final initialization of > SMP I can see > > rtems_interrupt_handler_install( > ARM_GIC_IRQ_SGI_0, > "IPI", > RTEMS_INTERRUPT_UNIQUE, > bsp_inter_processor_interrupt, > NULL > ); > > Raspberry Pi 2 does not have the generic interrupt controller. > Interrupt routing will have to be handled differently. So I > wish to understand how/ where it is used. I suppose this might > be the problem. > > > Sorry, that the documentation is so scattered. I think we should > move everything into the CPU Architecture Supplement. It would be > nice if you can help to improve the documentation since you have a > different view point. > > You must install the IPI during the system initialization. It is > raised via the _CPU_SMP_Send_interrupt() function, for an example > see arm-a9mpcore-smp.c. > >I could locate the function in arm-a9mpcore-smp.c. but it would be >helpful if I can know where this being called from, a deeper call >hierarchy, so that I can ascertain this is a problem. I can see a >Send_messgae function call this. But don't know where the send message >is being called from. > > >You can run one of the SMP tests on the realview_pbx_a9_qemu_smp BSP on >Qemu and set a break point to _CPU_SMP_Send_interrupt() if you want to >know how it is used. > > -- > Sebastian Huber, embedded brains GmbH > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > Phone : +49 89 189 47 41-16 > Fax : +49 89 189 47 41-09 > >E-Mail : sebastian.hu...@embedded-brains.de ><mailto:sebastian.hu...@embedded-brains.de> > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > > >-- >Joel Sherrill, Ph.D. Director of Research & Development >joel.sherr...@oarcorp.com On-Line Applications Research >Ask me about RTEMS: a free RTOS Huntsville AL 35805 >Support Available (256) 722-9985 > > > > >-- > >Rohini Kulkarni > > > > >-- > >Rohini Kulkarni --joel _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
