This patch adds the macro BSP_START_NEEDS_REGISTER_INITIALIZATION and three 
hooks for BSP-specific register init code to arm/shared/start.S. Said hooks are 
bsp_start_init_registers_core (intended for initializing the ARM core 
registers), bsp_start_init_registers_banked_fiq (for the FIQ mode banked 
registers) and bsp_start_init_registers_vfp (for the FPU registers). 
BSP_START_NEEDS_REGISTER_INITIALIZATION would be defined in a BSP's 
configure.ac (so that it appears in its bspopts.h).

This patch also adds the register init code required by the TMS570. We've 
tested it with the tms570ls3137_hdk.cfg config and it works fine.
---
Changes in v3:
    * Move bsp-start-init-registers.S to arm/shared/startup.
    * Don't push/pop r0 in bsp_start_init_registers_vfp.
    * Add VFP register init code for VFP-32 as well.

Changes in v2:
    * Add bsp_start_* prefixes.
    * Add *_banked_fiq suffixes to make it clear it's referring to the FIQ mode 
banked regs.

 c/src/lib/libbsp/arm/shared/start/start.S          |  28 ++++++
 .../arm/shared/startup/bsp-start-init-registers.S  | 105 +++++++++++++++++++++
 c/src/lib/libbsp/arm/tms570/Makefile.am            |   1 +
 c/src/lib/libbsp/arm/tms570/configure.ac           |   5 +
 4 files changed, 139 insertions(+)
 create mode 100644 
c/src/lib/libbsp/arm/shared/startup/bsp-start-init-registers.S

diff --git a/c/src/lib/libbsp/arm/shared/start/start.S 
b/c/src/lib/libbsp/arm/shared/start/start.S
index f5f0fa4..65aa23d 100644
--- a/c/src/lib/libbsp/arm/shared/start/start.S
+++ b/c/src/lib/libbsp/arm/shared/start/start.S
@@ -48,6 +48,12 @@
        .extern _ARMV4_Exception_fiq_default
        .extern _ARMV7M_Exception_default

+#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
+       .extern bsp_start_init_registers_core
+       .extern bsp_start_init_registers_banked_fiq
+       .extern bsp_start_init_registers_vfp
+#endif
+
        /* Global symbols */
        .globl  _start
        .globl  bsp_start_vector_table_begin
@@ -127,6 +133,10 @@ _start:
         * loader.
         */

+#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
+       bl bsp_start_init_registers_core
+#endif
+
 #ifdef RTEMS_SMP
        /* Read MPIDR */
        mrc     p15, 0, r0, c0, c0, 5
@@ -161,6 +171,10 @@ _start:
        add     sp, r1
 #endif

+#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
+       bl bsp_start_init_registers_banked_fiq
+#endif
+
        /* Enter ABT mode and set up the ABT stack pointer */
        mov     r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F)
        msr     cpsr, r0
@@ -207,6 +221,11 @@ _start:
        /* Enable FPU */
        mov r0, #(1 << 30)
        vmsr FPEXC, r0
+
+#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
+       bl bsp_start_init_registers_vfp
+#endif
+
 #endif /* ARM_MULTILIB_VFP */

        /*
@@ -304,6 +323,10 @@ bsp_start_vector_table_end:

 _start:

+#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
+       bl bsp_start_init_registers_core
+#endif
+
 #ifdef ARM_MULTILIB_VFP
        /*
         * Enable CP10 and CP11 coprocessors for privileged and user mode in
@@ -315,8 +338,13 @@ _start:
        str     r1, [r0]
        dsb
        isb
+
+#ifdef BSP_START_NEEDS_REGISTER_INITIALIZATION
+       bl bsp_start_init_registers_vfp
 #endif

+#endif /* ARM_MULTILIB_VFP */
+
        ldr     sp, =bsp_stack_main_end
        ldr     lr, =bsp_start_hook_0_done + 1
        b       bsp_start_hook_0
diff --git a/c/src/lib/libbsp/arm/shared/startup/bsp-start-init-registers.S 
b/c/src/lib/libbsp/arm/shared/startup/bsp-start-init-registers.S
new file mode 100644
index 0000000..2e308ce
--- /dev/null
+++ b/c/src/lib/libbsp/arm/shared/startup/bsp-start-init-registers.S
@@ -0,0 +1,105 @@
+/**
+ * @file bsp-start-init-registers.S
+ *
+ * @brief ARM register initialization routines.
+ */
+
+/*
+ * Copyright (c) 2015 Taller Technologies.  All rights reserved.
+ *
+ * @author Martin Galvan <martin.gal...@tallertechnologies.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+/*
+ * These routines initialize the core and VFP registers of ARM CPUs.
+ * This is necessary for boards that operate in a 1oo1D fashion,
+ * such as the TMS570.
+ */
+
+#include <rtems/asm.h>
+
+.section .text
+.syntax unified
+.cpu cortex-r4
+.arm
+
+/* Initialization of the ARM core registers. */
+FUNCTION_ENTRY(bsp_start_init_registers_core)
+       mov r0, #0
+       mov r1, #0
+       mov r2, #0
+       mov r3, #0
+       mov r4, #0
+       mov r5, #0
+       mov r6, #0
+       mov r7, #0
+       mov r8, #0
+       mov r9, #0
+       mov r10, #0
+       mov r11, #0
+       mov r12, #0
+       mov r13, #0
+
+       bx lr
+FUNCTION_END(bsp_start_init_registers_core)
+
+/* Initialization of the FIQ mode banked registers. */
+FUNCTION_ENTRY(bsp_start_init_registers_banked_fiq)
+       mov r8, #0
+       mov r9, #0
+       mov r10, #0
+       mov r11, #0
+       mov r12, #0
+
+       bx lr
+FUNCTION_END(bsp_start_init_registers_banked_fiq)
+
+#ifdef ARM_MULTILIB_VFP
+
+/* Initialization of the FPU registers. */
+FUNCTION_ENTRY(bsp_start_init_registers_vfp)
+       mov r0, #0
+       vmov d0, r0, r0
+       vmov d1, r0, r0
+       vmov d2, r0, r0
+       vmov d3, r0, r0
+       vmov d4, r0, r0
+       vmov d5, r0, r0
+       vmov d6, r0, r0
+       vmov d7, r0, r0
+       vmov d8, r0, r0
+       vmov d9, r0, r0
+       vmov d10, r0, r0
+       vmov d11, r0, r0
+       vmov d12, r0, r0
+       vmov d13, r0, r0
+       vmov d14, r0, r0
+       vmov d15, r0, r0
+
+#ifdef ARM_MULTILIB_VFP_D32
+       vmov d16, r0, r0
+       vmov d17, r0, r0
+       vmov d18, r0, r0
+       vmov d19, r0, r0
+       vmov d20, r0, r0
+       vmov d21, r0, r0
+       vmov d22, r0, r0
+       vmov d23, r0, r0
+       vmov d24, r0, r0
+       vmov d25, r0, r0
+       vmov d26, r0, r0
+       vmov d27, r0, r0
+       vmov d28, r0, r0
+       vmov d29, r0, r0
+       vmov d30, r0, r0
+       vmov d31, r0, r0
+#endif /* ARM_MULTILIB_VFP_D32 */
+
+       bx lr
+FUNCTION_END(bsp_start_init_registers_vfp)
+
+#endif /* ARM_MULTILIB_VFP */
diff --git a/c/src/lib/libbsp/arm/tms570/Makefile.am 
b/c/src/lib/libbsp/arm/tms570/Makefile.am
index bf3465d..6cad609 100644
--- a/c/src/lib/libbsp/arm/tms570/Makefile.am
+++ b/c/src/lib/libbsp/arm/tms570/Makefile.am
@@ -82,6 +82,7 @@ libbsp_a_SOURCES += ../../shared/cpucounterdiff.c

 # Startup
 libbsp_a_SOURCES += ../shared/startup/bsp-start-memcpy.S
+libbsp_a_SOURCES += ../shared/startup/bsp-start-init-registers.S
 libbsp_a_SOURCES += ../../shared/bsppretaskinghook.c
 libbsp_a_SOURCES += startup/bspreset.c
 libbsp_a_SOURCES += startup/bspstart.c
diff --git a/c/src/lib/libbsp/arm/tms570/configure.ac 
b/c/src/lib/libbsp/arm/tms570/configure.ac
index cefe50a..e06d4e4 100644
--- a/c/src/lib/libbsp/arm/tms570/configure.ac
+++ b/c/src/lib/libbsp/arm/tms570/configure.ac
@@ -36,6 +36,11 @@ RTEMS_BSPOPTS_SET([BSP_MINIMUM_TASK_STACK_SIZE],[*],[1024])
 RTEMS_BSPOPTS_HELP([BSP_MINIMUM_TASK_STACK_SIZE],[Suggested minimum task stack
                        size in bytes])

+RTEMS_BSPOPTS_SET([BSP_START_NEEDS_REGISTER_INITIALIZATION],[*],[1])
+RTEMS_BSPOPTS_HELP([BSP_START_NEEDS_REGISTER_INITIALIZATION],
+                                       [The TMS570 needs to have the registers 
of its CPU initialized
+                                       to avoid CCMR4F errors])
+
 RTEMS_BSPOPTS_SET([TMS570_OSCILLATOR_MAIN],[*],[12000000U])
 RTEMS_BSPOPTS_HELP([TMS570_OSCILLATOR_MAIN],[main oscillator frequency in Hz])

--
2.3.0

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