This patch allows the existing FPU code to support both VFP-D16 and VFP-D32.
According to the ARM ARM, writes to D32DIS are ignored for D16 so there's no
need to enclose the bic instruction with an #ifdef. We tested it on a
TMS570LS3137 using TI initialization code and it works fine.
Signed-off by: Martin Galvan <martin.gal...@tallertechnologies.com>
---
diff --git a/c/src/lib/libbsp/arm/shared/start/start.S
b/c/src/lib/libbsp/arm/shared/start/start.S
index ff970e1..4341e27 100644
--- a/c/src/lib/libbsp/arm/shared/start/start.S
+++ b/c/src/lib/libbsp/arm/shared/start/start.S
@@ -187,7 +187,7 @@ _start:
/* Stay in SVC mode */
-#ifdef ARM_MULTILIB_VFP_D32
+#ifdef ARM_MULTILIB_VFP
/* Read CPACR */
mrc p15, 0, r0, c1, c0, 2
@@ -196,6 +196,7 @@ _start:
orr r0, r0, #(1 << 22)
/* Clear ASEDIS and D32DIS */
+ /* Writes to D32DIS are ignored for VFP-D16 */
bic r0, r0, #(3 << 30)
/* Write CPACR */
@@ -205,7 +206,7 @@ _start:
/* Enable FPU */
mov r0, #(1 << 30)
vmsr FPEXC, r0
-#endif
+#endif /* ARM_MULTILIB_VFP */
/*
* Branch to start hook 0.
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