On 19/02/2015 7:25 am, Joel Sherrill wrote:
Yep. But if all we have is writeable vector tables at 0x0, then it MIGHT be ok. GCC may not be able to detect. But on the m68k's without a VBR register the table is always at 0x0.
Yeap ... https://git.rtems.org/rtems/commit/?id=dd309b10544bfceda968ac847ad34c3d90ca8281 I hit this one when testing on the mc5235. Chris _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
