---
c/src/lib/libbsp/powerpc/beatnik/include/bsp.h | 140 ++++---
.../lib/libbsp/powerpc/beatnik/irq/discovery_pic.c | 2 +-
.../lib/libbsp/powerpc/beatnik/marvell/gt_timer.c | 406 ++++++++++-----------
.../lib/libbsp/powerpc/beatnik/pci/pci_io_remap.c | 260 +++++++------
.../lib/libbsp/powerpc/beatnik/startup/bspstart.c | 9 +-
c/src/lib/libbsp/powerpc/beatnik/vme/VMEConfig.h | 81 ++--
6 files changed, 467 insertions(+), 431 deletions(-)
diff --git a/c/src/lib/libbsp/powerpc/beatnik/include/bsp.h
b/c/src/lib/libbsp/powerpc/beatnik/include/bsp.h
index c7f8cae..9cc9ae0 100644
--- a/c/src/lib/libbsp/powerpc/beatnik/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/beatnik/include/bsp.h
@@ -1,6 +1,8 @@
/*
* bsp.h -- contain BSP API definition.
- *
+ */
+
+/*
* Copyright (C) 1999 Eric Valette. vale...@crf.canon.fr
*
* The license and distribution terms for this file may be
@@ -11,9 +13,12 @@
*
* Modified for the 'beatnik' BSP by T. Straumann, 2005-2007.
*/
+
#ifndef LIBBSP_BEATNIK_BSP_H
#define LIBBSP_BEATNIK_BSP_H
+#ifndef ASM
+
#include <bspopts.h>
#include <bsp/default-initial-extension.h>
@@ -24,26 +29,25 @@
#include <bsp/vectors.h>
#ifdef __cplusplus
- extern "C" {
+extern "C" {
#endif
/* Board type */
typedef enum {
- Unknown = 0,
- MVME5500,
- MVME6100
+ Unknown = 0,
+ MVME5500,
+ MVME6100
} BSP_BoardType;
-BSP_BoardType
-BSP_getBoardType();
+BSP_BoardType BSP_getBoardType(void);
/* Discovery Version */
typedef enum {
- unknown = 0,
- GT_64260_A, /* Revision 0x10 */
- GT_64260_B, /* Revision 0x20 */
- MV_64360,
+ unknown = 0,
+ GT_64260_A, /* Revision 0x10 */
+ GT_64260_B, /* Revision 0x20 */
+ MV_64360,
} DiscoveryVersion;
/* Determine the type of discovery chip on this board; info
@@ -52,9 +56,7 @@ typedef enum {
* If a non-zero argument is passed, the routine panics
* (BSP_panic) if no recognized bridge is found;
*/
-
-DiscoveryVersion
-BSP_getDiscoveryVersion(int assertion);
+DiscoveryVersion BSP_getDiscoveryVersion(int assertion);
/*
* confdefs.h overrides for this BSP:
@@ -65,18 +67,18 @@ BSP_getDiscoveryVersion(int assertion);
/*
* base address definitions for several devices
*/
-#define BSP_MV64x60_BASE (0xf1000000)
-#define BSP_MV64x60_DEV1_BASE (0xf1100000)
-#define BSP_UART_IOBASE_COM1 ((BSP_MV64x60_DEV1_BASE)+0x20000)
-#define BSP_UART_IOBASE_COM2 ((BSP_MV64x60_DEV1_BASE)+0x21000)
+#define BSP_MV64x60_BASE (0xf1000000)
+#define BSP_MV64x60_DEV1_BASE (0xf1100000)
+#define BSP_UART_IOBASE_COM1 ((BSP_MV64x60_DEV1_BASE)+0x20000)
+#define BSP_UART_IOBASE_COM2 ((BSP_MV64x60_DEV1_BASE)+0x21000)
#define BSP_UART_USE_SHARED_IRQS
-#define BSP_NVRAM_BASE_ADDR (0xf1110000)
-#define BSP_NVRAM_END_ADDR (0xf1117fff)
-#define BSP_NVRAM_RTC_START (0xf1117ff8)
+#define BSP_NVRAM_BASE_ADDR (0xf1110000)
+#define BSP_NVRAM_END_ADDR (0xf1117fff)
+#define BSP_NVRAM_RTC_START (0xf1117ff8)
-#define BSP_NVRAM_BOOTPARMS_START (0xf1111000)
-#define BSP_NVRAM_BOOTPARMS_END (0xf1111fff)
+#define BSP_NVRAM_BOOTPARMS_START (0xf1111000)
+#define BSP_NVRAM_BOOTPARMS_END (0xf1111fff)
/* This is only active/used during early init. It defines
@@ -85,18 +87,22 @@ BSP_getDiscoveryVersion(int assertion);
* override the PCI configuration (see gt_pci_init.c:BSP_pci_initialize)
*/
-#define PCI_CONFIG_ADDR (BSP_MV64x60_BASE +
0xcf8)
-#define PCI_CONFIG_DATA (BSP_MV64x60_BASE +
0xcfc)
+#define PCI_CONFIG_ADDR (BSP_MV64x60_BASE + 0xcf8)
+#define PCI_CONFIG_DATA (BSP_MV64x60_BASE + 0xcfc)
/* our wonderful PCI initialization remaps everything to CPU addresses
* - before calling BSP_pci_initialize() this is NOT VALID, however
* and the deprecated inl()/outl() etc won't work!
*/
-#define _IO_BASE 0x00000000
-/* wonderful MotLoad has the base address as seen from the CPU programmed into
config space :-) */
-#define PCI_MEM_BASE 0
-#define PCI_MEM_BASE_ADJUSTMENT 0
-#define PCI_DRAM_OFFSET 0
+#define _IO_BASE 0x00000000
+/* wonderful MotLoad has the base address as seen from the
+ * CPU programmed into config space :-)
+ */
+#define PCI_MEM_BASE 0
+#define PCI_MEM_BASE_ADJUSTMENT 0
+#define PCI_DRAM_OFFSET 0
+
+extern void BSP_motload_pci_fixup(void);
/* PCI <-> local address mapping - no sophisticated windows
* (i.e., no support for cached regions etc. you read a BAR
@@ -106,20 +112,20 @@ BSP_getDiscoveryVersion(int assertion);
#define BSP_PCI2LOCAL_ADDR(a) ((uint32_t)(a))
#define BSP_LOCAL2PCI_ADDR(a) ((uint32_t)(a))
-#define BSP_CONFIG_NUM_PCI_CACHE_SLOTS 32
+#define BSP_CONFIG_NUM_PCI_CACHE_SLOTS 32
-#define BSP_CONSOLE_PORT BSP_UART_COM1
-#define BSP_UART_BAUD_BASE 115200
+#define BSP_CONSOLE_PORT BSP_UART_COM1
+#define BSP_UART_BAUD_BASE 115200
/* I2C Devices */
/* Note that the i2c addresses stated in the manual are
* left-shifted by one bit.
*/
-#define BSP_VPD_I2C_ADDR (0xA8>>1) /* the
VPD EEPROM */
-#define BSP_USR_I2C_ADDR (0xAA>>1) /* the
user EEPROM */
-#define BSP_THM_I2C_ADDR (0x90>>1) /* the
DS1621 temperature sensor & thermostat */
+#define BSP_VPD_I2C_ADDR (0xA8>>1) /* the VPD EEPROM */
+#define BSP_USR_I2C_ADDR (0xAA>>1) /* the user EEPROM */
+#define BSP_THM_I2C_ADDR (0x90>>1) /* the DS1621 temperature sensor &
thermostat */
-#define BSP_I2C_BUS_DESCRIPTOR gt64260_i2c_bus_descriptor
+#define BSP_I2C_BUS_DESCRIPTOR gt64260_i2c_bus_descriptor
#define BSP_I2C_BUS0_NAME "/dev/i2c0"
@@ -129,11 +135,11 @@ BSP_getDiscoveryVersion(int assertion);
#define BSP_I2C_THM_NAME BSP_I2C_DS1621_NAME
#define BSP_I2C_DS1621_RAW_NAME "ds1621-raw"
-#define BSP_I2C_VPD_EEPROM_DEV_NAME
(BSP_I2C_BUS0_NAME"."BSP_I2C_VPD_EEPROM_NAME)
-#define BSP_I2C_USR_EEPROM_DEV_NAME
(BSP_I2C_BUS0_NAME"."BSP_I2C_USR_EEPROM_NAME)
-#define BSP_I2C_DS1621_DEV_NAME
(BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_NAME)
+#define BSP_I2C_VPD_EEPROM_DEV_NAME
(BSP_I2C_BUS0_NAME"."BSP_I2C_VPD_EEPROM_NAME)
+#define BSP_I2C_USR_EEPROM_DEV_NAME
(BSP_I2C_BUS0_NAME"."BSP_I2C_USR_EEPROM_NAME)
+#define BSP_I2C_DS1621_DEV_NAME
(BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_NAME)
#define BSP_I2C_THM_DEV_NAME BSP_I2C_DS1621_DEV_NAME
-#define BSP_I2C_DS1621_RAW_DEV_NAME
(BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_RAW_NAME)
+#define BSP_I2C_DS1621_RAW_DEV_NAME
(BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_RAW_NAME)
/* Initialize the I2C driver and register all devices
@@ -148,8 +154,7 @@ BSP_getDiscoveryVersion(int assertion);
* /dev/i2c0.ds1621 (read-only; one byte: board-temp in degC)
* /dev/i2c0.ds1621-raw (read-write; transfer bytes to/from the ds1621)
*/
-int
-BSP_i2c_initialize();
+int BSP_i2c_initialize(void);
/* Networking; */
#if defined(RTEMS_NETWORKING)
@@ -157,27 +162,29 @@ BSP_i2c_initialize();
#endif
/* NOT FOR PUBLIC USE BELOW HERE */
-#define BSP_PCI_HOSE0_MEM_BASE 0x80000000 /* must be aligned to
size */
-#define BSP_PCI_HOSE0_MEM_SIZE 0x20000000
+#define BSP_PCI_HOSE0_MEM_BASE 0x80000000 /* must be aligned to size */
+#define BSP_PCI_HOSE0_MEM_SIZE 0x20000000
-#define BSP_PCI_HOSE1_MEM_BASE 0xe0000000
+#define BSP_PCI_HOSE1_MEM_BASE 0xe0000000
-#define BSP_DEV_AND_PCI_IO_BASE 0xf0000000
-#define BSP_DEV_AND_PCI_IO_SIZE 0x10000000
+#define BSP_DEV_AND_PCI_IO_BASE 0xf0000000
+#define BSP_DEV_AND_PCI_IO_SIZE 0x10000000
-/* maintain coherency between CPU and GT64340 ethernet (& possibly other
discovery components) */
-#define BSP_RW_PAGE_ATTRIBUTES TRIV121_ATTR_M
+/* maintain coherency between CPU and GT64340 Ethernet
+ * (andpossibly other Discovery components).
+ */
+#define BSP_RW_PAGE_ATTRIBUTES TRIV121_ATTR_M
extern unsigned BSP_pci_hose1_bus_base;
-void BSP_pci_initialize();
+void BSP_pci_initialize(void);
/* Exception Handling */
/* Use a task notepad to attach user exception handler info;
* may be changed by application startup code (EPICS uses 11)
*/
-#define BSP_EXCEPTION_NOTEPAD 14
+#define BSP_EXCEPTION_NOTEPAD 14
#ifndef ASM
@@ -257,14 +264,37 @@ extern unsigned long _BSP_clear_hostbridge_errors(int
enableMCP, int quiet);
* 16-bit error status on error.
*
*/
-extern unsigned short
-(*_BSP_clear_vmebridge_errors)(int);
+extern unsigned short (*_BSP_clear_vmebridge_errors)(int);
+/*
+ * Prototypes for debug helpers
+ */
+void discovery_pic_set_debug_irq(int on);
+void discovery_pic_install_debug_irq(void);
+
+/*
+ * Prototypes for methods called only from .S for dependency tracking
+ */
+char *save_boot_params(
+ void *r3,
+ void *r4,
+ void *r5,
+ char *cmdline_start,
+ char *cmdline_end
+);
+void zero_bss(void);
+
+/*
+ * Prototypes for methods in the BSP that cross file boundaries
+ */
+uint32_t probeMemoryEnd(void);
#endif
#ifdef __cplusplus
- }
+}
#endif
+#endif /* !ASM */
+
#endif
diff --git a/c/src/lib/libbsp/powerpc/beatnik/irq/discovery_pic.c
b/c/src/lib/libbsp/powerpc/beatnik/irq/discovery_pic.c
index de19f31..8efe2ce 100644
--- a/c/src/lib/libbsp/powerpc/beatnik/irq/discovery_pic.c
+++ b/c/src/lib/libbsp/powerpc/beatnik/irq/discovery_pic.c
@@ -196,7 +196,7 @@ int i;
}
}
-void discovery_dump_picregs(void)
+static void discovery_dump_picregs(void)
{
printk(" ..GPP_IRQ. -- ..MAIN_HI. -- ..MAIN_LO.\n");
printk("Cause:"); pregs(thePic.causes);
diff --git a/c/src/lib/libbsp/powerpc/beatnik/marvell/gt_timer.c
b/c/src/lib/libbsp/powerpc/beatnik/marvell/gt_timer.c
index d70c6a9..e53e8e1 100644
--- a/c/src/lib/libbsp/powerpc/beatnik/marvell/gt_timer.c
+++ b/c/src/lib/libbsp/powerpc/beatnik/marvell/gt_timer.c
@@ -14,13 +14,13 @@
* ----------
* This software ('beatnik' RTEMS BSP for MVME6100 and MVME5500) was
* created by Till Straumann <strau...@slac.stanford.edu>, 2005-2007,
- * Stanford Linear Accelerator Center, Stanford University.
+ * Stanford Linear Accelerator Center, Stanford University.
*
* Acknowledgement of sponsorship
* ------------------------------
* The 'beatnik' BSP was produced by
* the Stanford Linear Accelerator Center, Stanford University,
- * under Contract DE-AC03-76SFO0515 with the Department of Energy.
+ * under Contract DE-AC03-76SFO0515 with the Department of Energy.
*
* Government disclaimer of liability
* ----------------------------------
@@ -53,6 +53,7 @@
*
* ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03
*/
+
#include <rtems.h>
#include <bsp/gtreg.h>
#include <libcpu/io.h>
@@ -68,199 +69,196 @@
static inline uint32_t gt_rd(uint32_t off)
{
- return in_le32( (volatile unsigned *)(BSP_MV64x60_BASE+off) );
+ return in_le32( (volatile unsigned *)(BSP_MV64x60_BASE+off) );
}
static inline void gt_wr(uint32_t off, uint32_t val)
{
- out_le32( (volatile unsigned *)(BSP_MV64x60_BASE+off), val);
+ out_le32( (volatile unsigned *)(BSP_MV64x60_BASE+off), val);
}
static inline uint32_t gt_timer_bitmod(uint32_t off, uint32_t clr, uint32_t
set)
{
- unsigned flags;
- uint32_t rval;
- rtems_interrupt_disable(flags);
- rval = gt_rd( off );
- gt_wr( off, (rval & ~clr) | set );
- rtems_interrupt_enable(flags);
- return rval;
+ unsigned flags;
+ uint32_t rval;
+
+ rtems_interrupt_disable(flags);
+ rval = gt_rd( off );
+ gt_wr( off, (rval & ~clr) | set );
+ rtems_interrupt_enable(flags);
+ return rval;
}
-#define GT_TIMER_MAX 3
-#define TIMER_ARGCHECK(t) do { if ((t)<0 || (t)>GT_TIMER_MAX) return -1;
} while (0)
+#define GT_TIMER_MAX 3
+#define TIMER_ARGCHECK(t) do { if ((t)<0 || (t)>GT_TIMER_MAX) return -1; }
while (0)
static struct {
- void (*isr)(void *);
- void *arg;
+ void (*isr)(void *);
+ void *arg;
} gt_timer_isrs[GT_TIMER_MAX+1] = {{0},};
uint32_t BSP_timer_read(uint32_t timer)
{
- TIMER_ARGCHECK(timer);
- return gt_rd(GT_TIMER_0 + (timer<<2));
+ TIMER_ARGCHECK(timer);
+ return gt_rd(GT_TIMER_0 + (timer<<2));
}
int
BSP_timer_start(uint32_t timer, uint32_t period)
{
- TIMER_ARGCHECK(timer);
- gt_wr(GT_TIMER_0 + (timer<<2), period);
- return 0;
+ TIMER_ARGCHECK(timer);
+ gt_wr(GT_TIMER_0 + (timer<<2), period);
+ return 0;
}
int
BSP_timer_stop(uint32_t timer)
{
- TIMER_ARGCHECK(timer);
- /* disable, clear period, re-enable */
- gt_timer_bitmod(GT_TIMER_0_3_Ctl, GT_TIMER_0_Ctl_Enb << (timer<<3), 0);
- gt_wr(GT_TIMER_0 + (timer<<2), 0);
- gt_timer_bitmod(GT_TIMER_0_3_Ctl, 0, GT_TIMER_0_Ctl_Enb << (timer<<3));
- return 0;
+ TIMER_ARGCHECK(timer);
+ /* disable, clear period, re-enable */
+ gt_timer_bitmod(GT_TIMER_0_3_Ctl, GT_TIMER_0_Ctl_Enb << (timer<<3), 0);
+ gt_wr(GT_TIMER_0 + (timer<<2), 0);
+ gt_timer_bitmod(GT_TIMER_0_3_Ctl, 0, GT_TIMER_0_Ctl_Enb << (timer<<3));
+ return 0;
}
int
BSP_timer_setup(uint32_t timer, void (*isr)(void *arg), void *arg, int reload)
{
- TIMER_ARGCHECK(timer);
- if ( isr && gt_timer_isrs[timer].isr )
- return -1;
- BSP_timer_stop(timer);
- /* mask and clear */
- gt_timer_bitmod(GT_TIMER_0_3_Intr_Msk, GT_TIMER_0_Intr<<timer, 0);
- gt_timer_bitmod(GT_TIMER_0_3_Intr_Cse, GT_TIMER_0_Intr<<timer, 0);
-
- /* set reload bit */
- if ( reload )
- gt_timer_bitmod(GT_TIMER_0_3_Ctl, 0, GT_TIMER_0_Ctl_Rld <<
(timer<<3));
- else
- gt_timer_bitmod(GT_TIMER_0_3_Ctl, GT_TIMER_0_Ctl_Rld <<
(timer<<3), 0);
-
- asm volatile("":::"memory");
-
- if ( isr ) {
- gt_timer_isrs[timer].isr = isr;
- gt_timer_isrs[timer].arg = arg;
- asm volatile("":::"memory");
- gt_timer_bitmod(GT_TIMER_0_3_Intr_Msk, 0,
GT_TIMER_0_Intr<<timer);
- } else {
- gt_timer_isrs[timer].isr = 0;
- gt_timer_isrs[timer].arg = 0;
- }
- return 0;
+ TIMER_ARGCHECK(timer);
+ if ( isr && gt_timer_isrs[timer].isr )
+ return -1;
+
+ BSP_timer_stop(timer);
+ /* mask and clear */
+ gt_timer_bitmod(GT_TIMER_0_3_Intr_Msk, GT_TIMER_0_Intr<<timer, 0);
+ gt_timer_bitmod(GT_TIMER_0_3_Intr_Cse, GT_TIMER_0_Intr<<timer, 0);
+
+ /* set reload bit */
+ if ( reload )
+ gt_timer_bitmod(GT_TIMER_0_3_Ctl, 0, GT_TIMER_0_Ctl_Rld << (timer<<3));
+ else
+ gt_timer_bitmod(GT_TIMER_0_3_Ctl, GT_TIMER_0_Ctl_Rld << (timer<<3), 0);
+
+ asm volatile("":::"memory");
+
+ if ( isr ) {
+ gt_timer_isrs[timer].isr = isr;
+ gt_timer_isrs[timer].arg = arg;
+ asm volatile("":::"memory");
+ gt_timer_bitmod(GT_TIMER_0_3_Intr_Msk, 0, GT_TIMER_0_Intr<<timer);
+ } else {
+ gt_timer_isrs[timer].isr = 0;
+ gt_timer_isrs[timer].arg = 0;
+ }
+ return 0;
}
static void
gt_timer_hdl(rtems_irq_hdl_param arg)
{
-int iarg = (int)arg;
-int timer;
-uint32_t bit;
-
- for ( ; iarg; iarg >>= 4 ) {
- timer = (iarg & 0xf)-1;
- bit = GT_TIMER_0_Intr<<timer;
- if ( gt_timer_bitmod(GT_TIMER_0_3_Intr_Cse, bit, 0) & bit ) {
- /* cause was set */
- if ( ! gt_timer_isrs[timer].isr ) {
- printk("gt_timer: warning; no ISR connected but
and IRQ happened (timer # %i)\n", timer);
- /* mask */
- gt_timer_bitmod(GT_TIMER_0_3_Intr_Msk, bit, 0);
- } else {
-
gt_timer_isrs[timer].isr(gt_timer_isrs[timer].arg);
- }
- }
- }
+ int iarg = (int)arg;
+ int timer;
+ uint32_t bit;
+
+ for ( ; iarg; iarg >>= 4 ) {
+ timer = (iarg & 0xf)-1;
+ bit = GT_TIMER_0_Intr<<timer;
+ if ( gt_timer_bitmod(GT_TIMER_0_3_Intr_Cse, bit, 0) & bit ) {
+ /* cause was set */
+ if ( ! gt_timer_isrs[timer].isr ) {
+ printk("gt_timer: warning; no ISR connected but and IRQ happened
(timer # %i)\n", timer);
+ /* mask */
+ gt_timer_bitmod(GT_TIMER_0_3_Intr_Msk, bit, 0);
+ } else {
+ gt_timer_isrs[timer].isr(gt_timer_isrs[timer].arg);
+ }
+ }
+ }
}
int
BSP_timers_initialize(void)
{
-rtems_irq_connect_data xx = {0};
-int i, ainc, arg;
-
- xx.hdl = gt_timer_hdl;
- xx.on = 0;
- xx.off = 0;
- xx.isOn = 0;
-
- switch (BSP_getDiscoveryVersion(0)) {
- case MV_64360:
- i = 3;
- ainc = 1;
- arg = 4;
- break;
- default:
- i = 1;
- ainc = 0x0202;
- arg = 0x0403;
- break;
- }
-
- for ( ; i>=0; i--, arg-=ainc ) {
- xx.name = BSP_IRQ_TIME0_1 + i;
- xx.handle = (rtems_irq_hdl_param)arg;
- if ( !BSP_install_rtems_irq_handler(&xx) )
- return -1;
- }
-
- return 0;
+ rtems_irq_connect_data xx = {0};
+ int i, ainc, arg;
+
+ xx.hdl = gt_timer_hdl;
+ xx.on = 0;
+ xx.off = 0;
+ xx.isOn = 0;
+
+ switch (BSP_getDiscoveryVersion(0)) {
+ case MV_64360:
+ i = 3;
+ ainc = 1;
+ arg = 4;
+ break;
+ default:
+ i = 1;
+ ainc = 0x0202;
+ arg = 0x0403;
+ break;
+ }
+
+ for ( ; i>=0; i--, arg-=ainc ) {
+ xx.name = BSP_IRQ_TIME0_1 + i;
+ xx.handle = (rtems_irq_hdl_param)arg;
+ if ( !BSP_install_rtems_irq_handler(&xx) )
+ return -1;
+ }
+
+ return 0;
}
-int
+#ifdef DEBUG_MODULAR
+static int
BSP_timers_uninstall(void)
{
-rtems_irq_connect_data xx = {0};
-int i;
-
- xx.hdl = gt_timer_hdl;
- xx.on = 0;
- xx.off = 0;
- xx.isOn = 0;
-
- for ( i=0; i<= GT_TIMER_MAX; i++ ) {
- if ( BSP_timer_setup(i, 0, 0, 0) )
- return -1;
- }
-
- switch (BSP_getDiscoveryVersion(0)) {
- case MV_64360:
- i = 3;
- break;
- default:
- i = 1;
- break;
- }
-
- for ( ; i >= 0; i-- ) {
- xx.name = BSP_IRQ_TIME0_1 + i;
- BSP_get_current_rtems_irq_handler(&xx);
- if ( !BSP_remove_rtems_irq_handler(&xx) )
- return -1;
- }
-
- return 0;
+ rtems_irq_connect_data xx = {0};
+ int i;
+
+ xx.hdl = gt_timer_hdl;
+ xx.on = 0;
+ xx.off = 0;
+ xx.isOn = 0;
+
+ for ( i=0; i<= GT_TIMER_MAX; i++ ) {
+ if ( BSP_timer_setup(i, 0, 0, 0) )
+ return -1;
+ }
+
+ switch (BSP_getDiscoveryVersion(0)) {
+ case MV_64360:
+ i = 3;
+ break;
+ default:
+ i = 1;
+ break;
+ }
+
+ for ( ; i >= 0; i-- ) {
+ xx.name = BSP_IRQ_TIME0_1 + i;
+ BSP_get_current_rtems_irq_handler(&xx);
+ if ( !BSP_remove_rtems_irq_handler(&xx) )
+ return -1;
+ }
+
+ return 0;
}
+#endif
uint32_t
BSP_timer_clock_get(uint32_t timer)
{
- return BSP_bus_frequency;
+ return BSP_bus_frequency;
}
int BSP_timer_instances(void)
{
- return GT_TIMER_MAX + 1;
+ return GT_TIMER_MAX + 1;
}
-#ifdef DEBUG
-void BSP_timer_test_isr(void *arg)
-{
- printk("TIMER IRQ (user arg 0x%x)\n",arg);
-}
-#endif
-
/* On a 64260A we can't read the status (on/off), apparently
* so we maintain it locally and assume the firmware has
* not enabled the dog initially...
@@ -269,32 +267,33 @@ static uint32_t wdog_on = 0x00ffffff;
static uint32_t rd_wdcnf(void)
{
- uint32_t cnf = gt_rd(GT_WDOG_Config);
- /* BSD driver says that on the 64260A we always
- * read 0xffffffff so we have to maintain the
- * status locally (and hope we get the initial
- * value right).
- */
- if ( ~0 == cnf )
- cnf = wdog_on;
- return cnf;
+ uint32_t cnf = gt_rd(GT_WDOG_Config);
+
+ /* BSD driver says that on the 64260A we always
+ * read 0xffffffff so we have to maintain the
+ * status locally (and hope we get the initial
+ * value right).
+ */
+ if ( ~0 == cnf )
+ cnf = wdog_on;
+ return cnf;
}
/* change on/off state assume caller has IRQs disabled */
static void dog_toggle(uint32_t ctl)
{
- ctl &= ~( GT_WDOG_Config_Ctl1a | GT_WDOG_Config_Ctl1b \
- | GT_WDOG_Config_Ctl2a | GT_WDOG_Config_Ctl2b);
- gt_wr(GT_WDOG_Config, ctl | GT_WDOG_Config_Ctl1a);
- gt_wr(GT_WDOG_Config, ctl | GT_WDOG_Config_Ctl1b);
+ ctl &= ~( GT_WDOG_Config_Ctl1a | GT_WDOG_Config_Ctl1b \
+ | GT_WDOG_Config_Ctl2a | GT_WDOG_Config_Ctl2b);
+ gt_wr(GT_WDOG_Config, ctl | GT_WDOG_Config_Ctl1a);
+ gt_wr(GT_WDOG_Config, ctl | GT_WDOG_Config_Ctl1b);
}
static void dog_pet(uint32_t ctl)
{
- ctl &= ~( GT_WDOG_Config_Ctl1a | GT_WDOG_Config_Ctl1b \
- | GT_WDOG_Config_Ctl2a | GT_WDOG_Config_Ctl2b);
- gt_wr(GT_WDOG_Config, ctl | GT_WDOG_Config_Ctl2a);
- gt_wr(GT_WDOG_Config, ctl | GT_WDOG_Config_Ctl2b);
+ ctl &= ~( GT_WDOG_Config_Ctl1a | GT_WDOG_Config_Ctl1b \
+ | GT_WDOG_Config_Ctl2a | GT_WDOG_Config_Ctl2b);
+ gt_wr(GT_WDOG_Config, ctl | GT_WDOG_Config_Ctl2a);
+ gt_wr(GT_WDOG_Config, ctl | GT_WDOG_Config_Ctl2b);
}
@@ -307,41 +306,41 @@ static void dog_pet(uint32_t ctl)
int
BSP_watchdog_enable(uint32_t timeout_us)
{
-unsigned long long x = timeout_us;
-unsigned flags;
-uint32_t ctl;
+ unsigned long long x = timeout_us;
+ unsigned flags;
+ uint32_t ctl;
- x *= BSP_bus_frequency;
- x /= 256; /* there seems to be a prescaler */
+ x *= BSP_bus_frequency;
+ x /= 256; /* there seems to be a prescaler */
x /= 1000000; /* us/s */
- if ( x > (1<<24)-1 )
- x = (1<<24)-1;
+ if ( x > (1<<24)-1 )
+ x = (1<<24)-1;
- if ( 0xffffffff != timeout_us )
- timeout_us = x;
+ if ( 0xffffffff != timeout_us )
+ timeout_us = x;
- rtems_interrupt_disable(flags);
+ rtems_interrupt_disable(flags);
- ctl = rd_wdcnf();
+ ctl = rd_wdcnf();
- /* if enabled, disable first */
- if ( GT_WDOG_Config_Enb & ctl ) {
- dog_toggle(ctl);
- }
- if ( 0xffffffff == timeout_us ) {
- timeout_us = ctl & ((1<<24)-1);
- dog_toggle(ctl);
- dog_pet(ctl);
- } else {
- gt_wr(GT_WDOG_Config, timeout_us | GT_WDOG_Config_Ctl1a);
- gt_wr(GT_WDOG_Config, timeout_us | GT_WDOG_Config_Ctl1b);
- }
+ /* if enabled, disable first */
+ if ( GT_WDOG_Config_Enb & ctl ) {
+ dog_toggle(ctl);
+ }
+ if ( 0xffffffff == timeout_us ) {
+ timeout_us = ctl & ((1<<24)-1);
+ dog_toggle(ctl);
+ dog_pet(ctl);
+ } else {
+ gt_wr(GT_WDOG_Config, timeout_us | GT_WDOG_Config_Ctl1a);
+ gt_wr(GT_WDOG_Config, timeout_us | GT_WDOG_Config_Ctl1b);
+ }
- wdog_on = GT_WDOG_Config_Enb | timeout_us;
+ wdog_on = GT_WDOG_Config_Enb | timeout_us;
- rtems_interrupt_enable(flags);
- return 0;
+ rtems_interrupt_enable(flags);
+ return 0;
}
/* Disable watchdog
@@ -352,17 +351,17 @@ int BSP_watchdog_disable(void)
unsigned long flags;
uint32_t ctl;
- rtems_interrupt_disable(flags);
+ rtems_interrupt_disable(flags);
- ctl = rd_wdcnf();
+ ctl = rd_wdcnf();
- if ( (GT_WDOG_Config_Enb & ctl) ) {
- dog_toggle(ctl);
- wdog_on = ctl & ~(GT_WDOG_Config_Enb);
- }
+ if ( (GT_WDOG_Config_Enb & ctl) ) {
+ dog_toggle(ctl);
+ wdog_on = ctl & ~(GT_WDOG_Config_Enb);
+ }
- rtems_interrupt_enable(flags);
- return 0;
+ rtems_interrupt_enable(flags);
+ return 0;
}
/* Check status -- unfortunately there seems to be no way
@@ -372,10 +371,10 @@ uint32_t ctl;
*/
int BSP_watchdog_status(void)
{
-uint32_t ctl = rd_wdcnf();
+ uint32_t ctl = rd_wdcnf();
- /* report also the current period */
- return GT_WDOG_Config_Enb & ctl ? ctl : 0;
+ /* report also the current period */
+ return GT_WDOG_Config_Enb & ctl ? ctl : 0;
}
/* Pet the watchdog (rearm to configured timeout)
@@ -384,13 +383,14 @@ uint32_t ctl = rd_wdcnf();
*/
int BSP_watchdog_pet(void)
{
-unsigned long flags;
- if ( !wdog_on )
- return -1;
- rtems_interrupt_disable(flags);
- dog_pet(rd_wdcnf());
- rtems_interrupt_enable(flags);
- return 0;
+ unsigned long flags;
+
+ if ( !wdog_on )
+ return -1;
+ rtems_interrupt_disable(flags);
+ dog_pet(rd_wdcnf());
+ rtems_interrupt_enable(flags);
+ return 0;
}
@@ -398,13 +398,13 @@ unsigned long flags;
int
_cexpModuleFinalize(void *unused)
{
- BSP_watchdog_disable();
- return BSP_timers_uninstall();
+ BSP_watchdog_disable();
+ return BSP_timers_uninstall();
}
void
_cexpModuleInitialize(void *unused)
{
- BSP_timers_initialize();
+ BSP_timers_initialize();
}
#endif
diff --git a/c/src/lib/libbsp/powerpc/beatnik/pci/pci_io_remap.c
b/c/src/lib/libbsp/powerpc/beatnik/pci/pci_io_remap.c
index 101b86b..79dd297 100644
--- a/c/src/lib/libbsp/powerpc/beatnik/pci/pci_io_remap.c
+++ b/c/src/lib/libbsp/powerpc/beatnik/pci/pci_io_remap.c
@@ -5,13 +5,13 @@
* ----------
* This software ('beatnik' RTEMS BSP for MVME6100 and MVME5500) was
* created by Till Straumann <strau...@slac.stanford.edu>, 2005-2007,
- * Stanford Linear Accelerator Center, Stanford University.
+ * Stanford Linear Accelerator Center, Stanford University.
*
* Acknowledgement of sponsorship
* ------------------------------
* The 'beatnik' BSP was produced by
* the Stanford Linear Accelerator Center, Stanford University,
- * under Contract DE-AC03-76SFO0515 with the Department of Energy.
+ * under Contract DE-AC03-76SFO0515 with the Department of Energy.
*
* Government disclaimer of liability
* ----------------------------------
@@ -49,6 +49,7 @@
#include <rtems/bspIo.h>
#include <bsp/pci.h>
#include <stdint.h>
+#include "pci_io_remap.h"
#ifndef PCI_MULTI_FUN
#define PCI_MULTI_FUN 0x80
@@ -64,142 +65,139 @@
* of PCI-PCI bridges, too.
*
* RESTRICTIONS: 'offset' must be 4k aligned (PCI req.); no argument check
- * on the bus numbers is done.
+ * on the bus numbers is done.
*
* RETURNS: 0 on success and a number > 0 indicating the number of
* non-32bit bridges found where the offset couldn't be added.
* Devices behind such a bridge are not accessible through I/O
* and should probably be switched off (not done by this code).
*/
-
int
rtems_pci_io_remap(int bus_from, int bus_to, uint32_t offset)
{
-int rval = 0;
-
-int bus, dev, fun, maxf;
-int bar, numBars = 0;
-
-uint8_t b;
-uint16_t s;
-uint32_t d;
-unsigned int bas, lim;
-
- if ( offset & ((1<<12)-1) ) {
- BSP_panic("rtems_pci_io_remap(): offset must be 4k aligned");
- return -1;
- }
-
-
- for ( bus=bus_from; bus < bus_to; bus++ ) {
- for ( dev = 0; dev<PCI_MAX_DEVICES; dev++ ) {
-
- maxf = 1;
-
- for ( fun = 0; fun < maxf; fun++ ) {
- pci_read_config_word( bus, dev, fun,
PCI_VENDOR_ID, &s );
- if ( 0xffff == s )
- continue;
-
- pci_read_config_byte( bus, dev, fun,
PCI_HEADER_TYPE, &b );
-
- /* readjust the max. function number to scan if
this is a multi-function
- * device.
- */
- if ( 0 == fun && (PCI_MULTI_FUN & b) )
- maxf = PCI_MAX_FUNCTIONS;
-
- /* Check the header type; panic if unknown.
- * header type 0 has 6 bars, header type 1
(PCI-PCI bridge) has 2
- */
- b &= PCI_HEADER_TYPE_MSK;
- switch ( b ) {
- default:
- printk("PCI header type %i
(@%i/%i/%i)\n", b, bus, dev, fun);
-
BSP_panic("rtems_pci_io_remap(): unknown PCI header type");
- return -1; /* keep compiler happy */
-
- case PCI_HEADER_TYPE_CARDBUS:
- printk("PCI header type %i
(@%i/%i/%i)\n", b, bus, dev, fun);
-
BSP_panic("rtems_pci_io_remap(): don't know how to deal with Cardbus bridge");
- return -1;
-
- case PCI_HEADER_TYPE_NORMAL:
- numBars = 6*4; /* loop below
counts reg. offset in bytes */
- break;
-
- case PCI_HEADER_TYPE_BRIDGE:
- numBars = 2*4; /* loop below
counts reg. offset in bytes */
- break;
-
- }
-
- for ( bar = 0; bar < numBars; bar+=4 ) {
- pci_read_config_dword( bus, dev, fun,
PCI_BASE_ADDRESS_0 + bar, &d );
- if ( PCI_BASE_ADDRESS_SPACE_IO & d ) {
- /* It's an I/O BAR; remap */
- d &= PCI_BASE_ADDRESS_IO_MASK;
- if ( d ) {
- /* IO bar was
configured; add offset */
- d += offset;
- pci_write_config_dword(
bus, dev, fun, PCI_BASE_ADDRESS_0 + bar, d );
- }
- } else {
- /* skip upper half of 64-bit
window */
- d &=
PCI_BASE_ADDRESS_MEM_TYPE_MASK;
- if (
PCI_BASE_ADDRESS_MEM_TYPE_64 == d )
- bar+=4;
- }
- }
-
- /* Now it's time to deal with bridges */
- if ( PCI_HEADER_TYPE_BRIDGE == b ) {
- /* must adjust the limit registers */
- pci_read_config_byte( bus, dev, fun,
PCI_IO_LIMIT, &b );
- pci_read_config_word( bus, dev, fun,
PCI_IO_LIMIT_UPPER16, &s );
- lim = (s<<16) + (( b &
PCI_IO_RANGE_MASK ) << 8);
- lim += offset;
-
- pci_read_config_byte( bus, dev, fun,
PCI_IO_BASE, &b );
- pci_read_config_word( bus, dev, fun,
PCI_IO_BASE_UPPER16, &s );
- bas = (s<<16) + (( b &
PCI_IO_RANGE_MASK ) << 8);
- bas += offset;
-
- b &= PCI_IO_RANGE_TYPE_MASK;
- switch ( b ) {
- default:
- printk("Unknown IO
range type 0x%x (@%i/%i/%i)\n", b, bus, dev, fun);
-
BSP_panic("rtems_pci_io_remap(): unknown IO range type");
- return -1;
-
- case PCI_IO_RANGE_TYPE_16:
- if ( bas > 0xffff ||
lim > 0xffff ) {
- printk("PCI I/O
range type 1 (16bit) bridge (@%i/%i/%i) found:\n", bus, dev, fun);
-
printk("WARNING: base (0x%08x) or limit (0x%08x) exceed 16-bit;\n", bas, lim);
- printk("
devices behind this bridge are NOT accessible!\n");
-
- /* FIXME:
should we disable devices behind this bridge ? */
- bas = lim = 0;
- }
- break;
-
- case PCI_IO_RANGE_TYPE_32:
- break;
- }
-
- b = (uint8_t)((bas>>8) &
PCI_IO_RANGE_MASK);
- pci_write_config_byte( bus, dev, fun,
PCI_IO_BASE, b );
-
- s = (uint16_t)((bas>>16)&0xffff);
- pci_write_config_word( bus, dev, fun,
PCI_IO_BASE_UPPER16, s);
-
- b = (uint8_t)((lim>>8) &
PCI_IO_RANGE_MASK);
- pci_write_config_byte( bus, dev, fun,
PCI_IO_LIMIT, b );
- s = (uint16_t)((lim>>16)&0xffff);
- pci_write_config_word( bus, dev, fun,
PCI_IO_LIMIT_UPPER16, s );
- }
- }
- }
- }
- return rval;
+ int rval = 0;
+ int bus, dev, fun, maxf;
+ int bar, numBars = 0;
+ uint8_t b;
+ uint16_t s;
+ uint32_t d;
+ unsigned int bas, lim;
+
+ if ( offset & ((1<<12)-1) ) {
+ BSP_panic("rtems_pci_io_remap(): offset must be 4k aligned");
+ return -1;
+ }
+
+
+ for ( bus=bus_from; bus < bus_to; bus++ ) {
+ for ( dev = 0; dev<PCI_MAX_DEVICES; dev++ ) {
+
+ maxf = 1;
+
+ for ( fun = 0; fun < maxf; fun++ ) {
+ pci_read_config_word( bus, dev, fun, PCI_VENDOR_ID, &s );
+ if ( 0xffff == s )
+ continue;
+
+ pci_read_config_byte( bus, dev, fun, PCI_HEADER_TYPE, &b );
+
+ /* readjust the max. function number to scan if this is a
multi-function
+ * device.
+ */
+ if ( 0 == fun && (PCI_MULTI_FUN & b) )
+ maxf = PCI_MAX_FUNCTIONS;
+
+ /* Check the header type; panic if unknown.
+ * header type 0 has 6 bars, header type 1 (PCI-PCI bridge) has 2
+ */
+ b &= PCI_HEADER_TYPE_MSK;
+ switch ( b ) {
+ default:
+ printk("PCI header type %i (@%i/%i/%i)\n", b, bus, dev, fun);
+ BSP_panic("rtems_pci_io_remap(): unknown PCI header type");
+ return -1; /* keep compiler happy */
+
+ case PCI_HEADER_TYPE_CARDBUS:
+ printk("PCI header type %i (@%i/%i/%i)\n", b, bus, dev, fun);
+ BSP_panic("rtems_pci_io_remap(): don't know how to deal with
Cardbus bridge");
+ return -1;
+
+ case PCI_HEADER_TYPE_NORMAL:
+ numBars = 6*4; /* loop below counts reg. offset in bytes */
+ break;
+
+ case PCI_HEADER_TYPE_BRIDGE:
+ numBars = 2*4; /* loop below counts reg. offset in bytes */
+ break;
+
+ }
+
+ for ( bar = 0; bar < numBars; bar+=4 ) {
+ pci_read_config_dword( bus, dev, fun, PCI_BASE_ADDRESS_0 + bar, &d );
+ if ( PCI_BASE_ADDRESS_SPACE_IO & d ) {
+ /* It's an I/O BAR; remap */
+ d &= PCI_BASE_ADDRESS_IO_MASK;
+ if ( d ) {
+ /* IO bar was configured; add offset */
+ d += offset;
+ pci_write_config_dword( bus, dev, fun, PCI_BASE_ADDRESS_0 + bar,
d );
+ }
+ } else {
+ /* skip upper half of 64-bit window */
+ d &= PCI_BASE_ADDRESS_MEM_TYPE_MASK;
+ if ( PCI_BASE_ADDRESS_MEM_TYPE_64 == d )
+ bar+=4;
+ }
+ }
+
+ /* Now it's time to deal with bridges */
+ if ( PCI_HEADER_TYPE_BRIDGE == b ) {
+ /* must adjust the limit registers */
+ pci_read_config_byte( bus, dev, fun, PCI_IO_LIMIT, &b );
+ pci_read_config_word( bus, dev, fun, PCI_IO_LIMIT_UPPER16, &s );
+ lim = (s<<16) + (( b & PCI_IO_RANGE_MASK ) << 8);
+ lim += offset;
+
+ pci_read_config_byte( bus, dev, fun, PCI_IO_BASE, &b );
+ pci_read_config_word( bus, dev, fun, PCI_IO_BASE_UPPER16, &s );
+ bas = (s<<16) + (( b & PCI_IO_RANGE_MASK ) << 8);
+ bas += offset;
+
+ b &= PCI_IO_RANGE_TYPE_MASK;
+ switch ( b ) {
+ default:
+ printk("Unknown IO range type 0x%x (@%i/%i/%i)\n", b, bus, dev,
fun);
+ BSP_panic("rtems_pci_io_remap(): unknown IO range type");
+ return -1;
+
+ case PCI_IO_RANGE_TYPE_16:
+ if ( bas > 0xffff || lim > 0xffff ) {
+ printk("PCI I/O range type 1 (16bit) bridge (@%i/%i/%i)
found:\n", bus, dev, fun);
+ printk("WARNING: base (0x%08x) or limit (0x%08x) exceed
16-bit;\n", bas, lim);
+ printk(" devices behind this bridge are NOT
accessible!\n");
+
+ /* FIXME: should we disable devices behind this bridge ? */
+ bas = lim = 0;
+ }
+ break;
+
+ case PCI_IO_RANGE_TYPE_32:
+ break;
+ }
+
+ b = (uint8_t)((bas>>8) & PCI_IO_RANGE_MASK);
+ pci_write_config_byte( bus, dev, fun, PCI_IO_BASE, b );
+
+ s = (uint16_t)((bas>>16)&0xffff);
+ pci_write_config_word( bus, dev, fun, PCI_IO_BASE_UPPER16, s);
+
+ b = (uint8_t)((lim>>8) & PCI_IO_RANGE_MASK);
+ pci_write_config_byte( bus, dev, fun, PCI_IO_LIMIT, b );
+ s = (uint16_t)((lim>>16)&0xffff);
+ pci_write_config_word( bus, dev, fun, PCI_IO_LIMIT_UPPER16, s );
+ }
+ }
+ }
+ }
+ return rval;
}
diff --git a/c/src/lib/libbsp/powerpc/beatnik/startup/bspstart.c
b/c/src/lib/libbsp/powerpc/beatnik/startup/bspstart.c
index d5dcd15..773ac21 100644
--- a/c/src/lib/libbsp/powerpc/beatnik/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/beatnik/startup/bspstart.c
@@ -143,8 +143,13 @@ char *BSP_commandline_string = cmdline_buf;
/* this routine is called early and must be safe with a not properly
* aligned stack
*/
-char *
-save_boot_params(void *r3, void *r4, void* r5, char *cmdline_start, char
*cmdline_end)
+char *save_boot_params(
+ void *r3,
+ void *r4,
+ void *r5,
+ char *cmdline_start,
+ char *cmdline_end
+)
{
int i=cmdline_end-cmdline_start;
if ( i >= CMDLINE_BUF_SIZE )
diff --git a/c/src/lib/libbsp/powerpc/beatnik/vme/VMEConfig.h
b/c/src/lib/libbsp/powerpc/beatnik/vme/VMEConfig.h
index b3bccee..986a016 100644
--- a/c/src/lib/libbsp/powerpc/beatnik/vme/VMEConfig.h
+++ b/c/src/lib/libbsp/powerpc/beatnik/vme/VMEConfig.h
@@ -8,13 +8,13 @@
* ----------
* This software ('beatnik' RTEMS BSP for MVME6100 and MVME5500) was
* created by Till Straumann <strau...@slac.stanford.edu>, 2005-2007,
- * Stanford Linear Accelerator Center, Stanford University.
+ * Stanford Linear Accelerator Center, Stanford University.
*
* Acknowledgement of sponsorship
* ------------------------------
* The 'beatnik' BSP was produced by
* the Stanford Linear Accelerator Center, Stanford University,
- * under Contract DE-AC03-76SFO0515 with the Department of Energy.
+ * under Contract DE-AC03-76SFO0515 with the Department of Energy.
*
* Government disclaimer of liability
* ----------------------------------
@@ -56,56 +56,59 @@
* hardcoded window lengths that match this
* layout when setting BATs:
*/
-#define _VME_A32_WIN0_ON_PCI 0x90000000
+#define _VME_A32_WIN0_ON_PCI 0x90000000
/* If _VME_CSR_ON_PCI is defined then the A32 window is reduced to accommodate
* CSR for space.
*/
-#define _VME_CSR_ON_PCI 0x9e000000
-#define _VME_A24_ON_PCI 0x9f000000
-#define _VME_A16_ON_PCI 0x9fff0000
+#define _VME_CSR_ON_PCI 0x9e000000
+#define _VME_A24_ON_PCI 0x9f000000
+#define _VME_A16_ON_PCI 0x9fff0000
/* start of the A32 window on the VME bus
* TODO: this should perhaps be a configuration option
*/
-#define _VME_A32_WIN0_ON_VME 0x20000000
+#define _VME_A32_WIN0_ON_VME 0x20000000
/* if _VME_DRAM_OFFSET is defined, the BSP
* will map our RAM onto the VME bus, starting
* at _VME_DRAM_OFFSET
*/
-#define _VME_DRAM_OFFSET 0x90000000
+#define _VME_DRAM_OFFSET 0x90000000
-#define BSP_VME_INSTALL_IRQ_MGR(err) \
- do { \
- err = -1; \
- switch (BSP_getBoardType()) { \
- case MVME6100: \
- err = theOps->install_irq_mgr( \
- VMETSI148_IRQ_MGR_FLAG_SHARED, \
- 0, BSP_IRQ_GPP_0 + 20,
\
- 1, BSP_IRQ_GPP_0 + 21,
\
- 2, BSP_IRQ_GPP_0 + 22,
\
- 3, BSP_IRQ_GPP_0 + 23,
\
- -1); \
- break; \
-
\
- case MVME5500: \
- err = theOps->install_irq_mgr( \
- VMEUNIVERSE_IRQ_MGR_FLAG_SHARED |
\
- VMEUNIVERSE_IRQ_MGR_FLAG_PW_WORKAROUND,
\
- 0, BSP_IRQ_GPP_0 + 12,
\
- 1, BSP_IRQ_GPP_0 + 13,
\
- 2, BSP_IRQ_GPP_0 + 14,
\
- 3, BSP_IRQ_GPP_0 + 15,
\
- -1);
\
- break; \
-
\
- default: \
- printk("WARNING: unknown board; ");
\
- break; \
- }
\
- if ( err ) \
- printk("VME interrupt manager NOT INSTALLED (error: %i)\n", err); \
+extern int BSP_VMEInit(void);
+extern int BSP_VMEIrqMgrInstall(void);
+
+#define BSP_VME_INSTALL_IRQ_MGR(err) \
+ do { \
+ err = -1; \
+ switch (BSP_getBoardType()) { \
+ case MVME6100: \
+ err = theOps->install_irq_mgr( \
+ VMETSI148_IRQ_MGR_FLAG_SHARED, \
+ 0, BSP_IRQ_GPP_0 + 20, \
+ 1, BSP_IRQ_GPP_0 + 21, \
+ 2, BSP_IRQ_GPP_0 + 22, \
+ 3, BSP_IRQ_GPP_0 + 23, \
+ -1); \
+ break; \
+\
+ case MVME5500: \
+ err = theOps->install_irq_mgr( \
+ VMEUNIVERSE_IRQ_MGR_FLAG_SHARED | \
+ VMEUNIVERSE_IRQ_MGR_FLAG_PW_WORKAROUND, \
+ 0, BSP_IRQ_GPP_0 + 12, \
+ 1, BSP_IRQ_GPP_0 + 13, \
+ 2, BSP_IRQ_GPP_0 + 14, \
+ 3, BSP_IRQ_GPP_0 + 15, \
+ -1); \
+ break; \
+\
+ default: \
+ printk("WARNING: unknown board; "); \
+ break; \
+ } \
+ if ( err ) \
+ printk("VME interrupt manager NOT INSTALLED (error: %i)\n", err); \
} while (0)
#endif
--
1.9.3
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