---
 c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c   |    14 +-
 c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c |     2 +
 .../libbsp/powerpc/score603e/PCI_bus/universe.c    |    23 +-
 .../lib/libbsp/powerpc/score603e/console/console.c |    40 +-
 c/src/lib/libbsp/powerpc/score603e/cscope.out      | 11129 +++++++++++++++++++
 c/src/lib/libbsp/powerpc/score603e/include/bsp.h   |    88 +-
 c/src/lib/libbsp/powerpc/score603e/irq/FPGA.c      |    11 +-
 7 files changed, 11197 insertions(+), 110 deletions(-)
 create mode 100644 c/src/lib/libbsp/powerpc/score603e/cscope.out

diff --git a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c 
b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c
index 817037e..999ab93 100644
--- a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c
+++ b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c
@@ -1,6 +1,5 @@
 /*
- *
- *  COPYRIGHT (c) 1989-2009.
+ *  COPYRIGHT (c) 1989-2014.
  *  On-Line Applications Research Corporation (OAR).
  *
  *  The license and distribution terms for this file may be
@@ -25,10 +24,10 @@
  * an UNIVERSE register, without sufficient delay, the second access will
  * not work correctly.
  */
-void PCI_bus_delay (void)
+static void PCI_bus_delay (void)
 {
-  __asm__ ("   nop");
-  __asm__ (" nop");
+  __asm__ volatile ("nop");
+  __asm__ volatile ("nop");
 }
 
 /*
@@ -43,7 +42,7 @@ void PCI_bus_write(
   *_addr = _data;
 }
 
-uint32_t         PCI_bus_read(
+uint32_t PCI_bus_read(
   volatile uint32_t         *  _addr                  /* IN */
 )
 {
@@ -57,8 +56,7 @@ uint32_t         PCI_bus_read(
  * PCI Configuration Cycle Read/Write Access which is used to access all of
  * devices registers on the PCI bus.  i.e.: Universe, Ethernet & PMC.
  */
-
-uint32_t         Read_pci_device_register(
+uint32_t Read_pci_device_register(
   uint32_t         address
 )
 {
diff --git a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c 
b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c
index c50c09b..a2e084a 100644
--- a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c
+++ b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c
@@ -60,6 +60,7 @@ unsigned int SCORE603e_FLASH_verify_enable( void )
   return RTEMS_SUCCESSFUL;
 }
 
+#if 0
 unsigned int SCORE603e_FLASH_pci_reset_reg(
   uint8_t          reg,
   uint32_t         cmask,
@@ -79,6 +80,7 @@ unsigned int SCORE603e_FLASH_pci_reset_reg(
   }
   return RTEMS_SUCCESSFUL;
 }
+#endif
 
 /*
  *  SCORE603e_FLASH_Enable_writes
diff --git a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c 
b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c
index a1011da..c373aa6 100644
--- a/c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c
+++ b/c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c
@@ -16,22 +16,6 @@
 #include <bsp.h>
 #include "PCI.h"
 
-/********************************************************************
- ********************************************************************
- *********                                                  *********
- *********                  Prototypes                      *********
- *********                                                  *********
- ********************************************************************
- ********************************************************************/
-
-/********************************************************************
- ********************************************************************
- *********                                                  *********
- *********                                                  *********
- *********                                                  *********
- ********************************************************************
- ********************************************************************/
-
 typedef struct {
   uint32_t         PCI_ID;                 /* 0x80030000 */
   uint32_t         PCI_CSR;                /* 0x80030004 */
@@ -153,7 +137,6 @@ volatile Universe_Memory *UNIVERSE =
  * by the boot code.  This routine should be called by user code only if
  * a complete SCORE603e VME initialization is required.
  */
-
 void initialize_universe(void)
 {
   uint32_t         jumper_selection;
@@ -227,7 +210,7 @@ void set_vme_base_address (
 /*
  * Gets the VME base address
  */
-uint32_t         get_vme_base_address (void)
+static uint32_t get_vme_base_address (void)
 {
   volatile uint32_t         temp;
 
@@ -236,7 +219,7 @@ uint32_t         get_vme_base_address (void)
   return (temp);
 }
 
-uint32_t         get_vme_slave_size(void)
+uint32_t get_vme_slave_size(void)
 {
   volatile uint32_t         temp;
   temp  =  PCI_bus_read( &UNIVERSE->VSI0_BD);
@@ -249,7 +232,7 @@ uint32_t         get_vme_slave_size(void)
  * Set the size of the VME slave image
  * Note: The maximum size is up to 24 M bytes. (00000000 - 017FFFFF)
  */
-void set_vme_slave_size (uint32_t         size)
+void set_vme_slave_size (uint32_t size)
 {
   volatile uint32_t         temp;
 
diff --git a/c/src/lib/libbsp/powerpc/score603e/console/console.c 
b/c/src/lib/libbsp/powerpc/score603e/console/console.c
index 5ae61ea..afbc5b4 100644
--- a/c/src/lib/libbsp/powerpc/score603e/console/console.c
+++ b/c/src/lib/libbsp/powerpc/score603e/console/console.c
@@ -4,8 +4,10 @@
  *  This driver uses the termios pseudo driver.
  *
  *  Currently only polled mode is supported.
- *
- *  COPYRIGHT (c) 1989-2009.
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-2014.
  *  On-Line Applications Research Corporation (OAR).
  *
  *  The license and distribution terms for this file may be
@@ -36,14 +38,12 @@ int USE_FOR_CONSOLE = USE_FOR_CONSOLE_DEF;
  *  Console Device Driver Entry Points
  */
 
-/* PAGE
- *
+/*
  *  console_inbyte_nonblocking
  *
  *  Console Termios polling input entry point.
  */
-
-int console_inbyte_nonblocking(
+static int console_inbyte_nonblocking(
   int minor
 )
 {
@@ -164,8 +164,7 @@ void console_outbyte_interrupts(
 
 #endif
 
-/* PAGE
- *
+/*
  *  console_initialize
  *
  *  Routine called to initialize the console device driver.
@@ -178,7 +177,7 @@ rtems_device_driver console_initialize(
 {
   rtems_status_code          status;
   rtems_device_minor_number  console;
-  int                        port, chip, p0,p1;
+  int                        port, p0,p1;
 
   /*
    * initialize the termio interface.
@@ -234,7 +233,6 @@ rtems_device_driver console_initialize(
    */
 
   for (port=1; port<NUM_Z85C30_PORTS; port++) {
-   chip = port >> 1;
     initialize_85c30_port( &Ports_85C30[port] );
   }
 
@@ -245,14 +243,13 @@ rtems_device_driver console_initialize(
   return RTEMS_SUCCESSFUL;
 }
 
-/* PAGE
- *
+/*
  *  console_write_support
  *
  *  Console Termios output entry point.
  *
  */
-ssize_t console_write_support(
+static ssize_t console_write_support(
   int   minor,
   const char *buf,
   size_t   len)
@@ -289,12 +286,10 @@ ssize_t console_write_support(
   return nwrite;
 }
 
-/* PAGE
- *
+/*
  *  console_open
  *
  *  open a port as a termios console.
- *
  */
 rtems_device_driver console_open(
   rtems_device_major_number major,
@@ -354,19 +349,10 @@ rtems_device_driver console_open(
 }
 
 #if (CONSOLE_USE_INTERRUPTS)
-
 /*
  *  console_outbyte_interrupts
  *
  *  This routine transmits a character out.
- *
- *  Input parameters:
- *    port - port to transmit character to
- *    ch  - character to be transmitted
- *
- *  Output parameters:  NONE
- *
- *  Return values:      NONE
  */
 void console_outbyte_interrupts(
   const Port_85C30_info *Port,
@@ -396,12 +382,10 @@ void console_outbyte_interrupts(
 
   Ring_buffer_Add_character( &protocol->TX_Buffer, ch );
 }
-
 #endif
 
 /* const char arg to be compatible with BSP_output_char decl. */
-void
-debug_putc_onlcr(const char c)
+static void debug_putc_onlcr(const char c)
 {
   int                      console;
   volatile uint8_t         *csr;
diff --git a/c/src/lib/libbsp/powerpc/score603e/cscope.out 
b/c/src/lib/libbsp/powerpc/score603e/cscope.out
new file mode 100644
index 0000000..80b31bd
--- /dev/null
+++ b/c/src/lib/libbsp/powerpc/score603e/cscope.out
@@ -0,0 +1,11129 @@
+cscope 15 $HOME/rtems-4.11-work/rtems/c/src/lib/libbsp/powerpc/score603e       
        0000068551
+       @PCI_bus/PCI.c
+
+10 
+       ~<?ems.h
+>
+
+11 
+       ~<as??.h
+>
+
+12 
+       ~<?dio.h
+>
+
+14 
+       ~<b?.h
+>
+
+27 
+       $PCI_bus_d?ay
+ ()
+
+29 
+__asm__
+ volatile ("nop");
+
+30 
+__asm__
+ volatile ("nop");
+
+31 
+       }
+}
+
+36 
+       $PCI_bus_wr?e
+(
+
+37 v????
+u?t32_t
+ * 
+_addr
+,
+
+38 
+u?t32_t
+ 
+_d?a
+
+
+41 
+_d?a
+ = 
+       `C?v?t_End?n_32
+( _data );
+
+42 *
+_addr
+ = 
+_d?a
+;
+
+43 
+       }
+}
+
+45 
+u?t32_t
+ 
+       $PCI_bus_?ad
+(
+
+46 v????
+u?t32_t
+ * 
+_addr
+
+
+49 
+u?t32_t
+ 
+d?a
+;
+
+51 
+d?a
+ = *
+_addr
+;
+
+52 
+d?a
+ = 
+       `C?v?t_End?n_32
+( data );
+
+53  
+d?a
+;
+
+54 
+       }
+}
+
+59 
+u?t32_t
+ 
+       $R?d_pci_devi?_?gi??
+(
+
+60 
+u?t32_t
+ 
+add?ss
+
+
+63 
+u?t32_t
+ 
+d?a
+;
+
+68 
+       `PCI_bus_wr?e
+?(v????
+u?t32_t
+*)
+SCORE603E_PCI_IO_CFG_ADDR
+, 
+add?ss
+ );
+
+73 
+       `PCI_bus_d?ay
+ ();
+
+78 
+d?a
+ = 
+       `PCI_bus_?ad
+?(v????
+u?t32_t
+*)
+SCORE603E_PCI_IO_CFG_DATA
+ );
+
+80  
+d?a
+;
+
+81 
+       }
+}
+
+83 
+       $Wr?e_pci_devi?_?gi??
+(
+
+84 
+u?t32_t
+ 
+add?ss
+,
+
+85 
+u?t32_t
+ 
+d?a
+
+
+91 
+       `PCI_bus_wr?e
+?(v????
+u?t32_t
+*)
+SCORE603E_PCI_IO_CFG_ADDR
+, 
+add?ss
+ );
+
+96 
+       `PCI_bus_d?ay
+ ();
+
+101 
+       `PCI_bus_wr?e
+?(v????
+u?t32_t
+*)
+SCORE603E_PCI_IO_CFG_DATA
+, 
+d?a
+ );
+
+102 
+       }
+}
+
+       @PCI_bus/PCI.h
+
+17 #i?de?
+__PCI_h
+
+
+18 
+       #__PCI_h
+
+
+       )
+
+24 
+PCI_bus_wr?e
+(
+
+25 v????
+u?t32_t
+ * 
+_addr
+,
+
+26 
+u?t32_t
+ 
+_d?a
+
+
+29 
+u?t32_t
+ 
+PCI_bus_?ad
+(
+
+30 v????
+u?t32_t
+ * 
+_addr
+
+
+33 
+u?t32_t
+ 
+R?d_pci_devi?_?gi??
+(
+
+34 
+u?t32_t
+ 
+add?ss
+
+
+37 
+Wr?e_pci_devi?_?gi??
+(
+
+38 
+u?t32_t
+ 
+add?ss
+,
+
+39 
+u?t32_t
+ 
+d?a
+
+
+       @PCI_bus/flash.c
+
+10 
+       ~<?ems.h
+>
+
+11 
+       ~<as??.h
+>
+
+12 
+       ~<?dio.h
+>
+
+13 
+       ~<??y?s.h
+>
+
+15 
+       ~<b?.h
+>
+
+16 
+       ~<b?/?q.h
+>
+
+17 
+       ~"PCI.h
+"
+
+22 
+       $SCORE603e_FLASH_Di?b?
+(
+
+23 
+u?t32_t
+ 
+??
+
+
+26 
+u?t8_t
+ 
+v?ue
+;
+
+28 
+v?ue
+ = *
+SCORE603E_BOARD_CTRL_REG
+;
+
+29 
+v?ue
+ = v?u?| (~
+SCORE603E_BRD_FLASH_DISABLE_MASK
+);
+
+30 *
+SCORE603E_BOARD_CTRL_REG
+ = 
+v?ue
+;
+
+32  
+RTEMS_SUCCESSFUL
+;
+
+33 
+       }
+}
+
+35 
+       $SCORE603e_FLASH_v?ify_?ab?
+( )
+
+37 v????
+u?t8_t
+ *
+C?l_S?tus_Regi??
+ =
+
+38 (*)
+SCORE603E_BOARD_CTRL_REG
+;
+
+39 
+u?t8_t
+ 
+??_v?ue
+;
+
+40 
+u?t32_t
+ 
+pci_v?ue
+;
+
+42 
+??_v?ue
+ = *
+C?l_S?tus_Regi??
+;
+
+43 i??
+??_v?ue
+ & 
+SCORE603E_BRD_FLASH_DISABLE_MASK
+ ) {
+
+44 
+       `??tf
+ ("Flash Writes Disabled by board control?egister %x\n",
+
+45 
+??_v?ue
+ );
+
+46 
+       `as??
+( 0x0 );
+
+49 
+pci_v?ue
+ = 
+       `R?d_pci_devi?_?gi??
+( 0x800000A8 );
+
+50 i?(?
+pci_v?ue
+ & 0x00001000 ) == 0) {
+
+51 
+       `??tf
+("Error PCI A8 \n");
+
+52 
+       `as??
+( 0x0 );
+
+55 
+pci_v?ue
+ = 
+       `R?d_pci_devi?_?gi??
+( 0x800000AC );
+
+56 i??
+pci_v?ue
+ & 0x02000000) {
+
+57 
+       `??tf
+("Error PCI AC \n");
+
+58 
+       `as??
+( 0x0 );
+
+60  
+RTEMS_SUCCESSFUL
+;
+
+61 
+       }
+}
+
+64 
+       $SCORE603e_FLASH_pci_??t_?g
+(
+
+65 
+u?t8_t
+ 
+?g
+,
+
+66 
+u?t32_t
+ 
+cmask
+,
+
+67 
+u?t32_t
+ 
+mask
+
+
+70 
+u?t32_t
+ 
+pci_v?ue
+;
+
+71 
+u?t32_t
+ 
+v?ue
+;
+
+73 
+pci_v?ue
+ = 
+       `R?d_pci_devi?_?gi??
+?
+?g
+ );
+
+74 
+pci_v?ue
+ &?
+cmask
+;
+
+75 
+pci_v?ue
+ |?
+mask
+;
+
+76 
+       `Wr?e_pci_devi?_?gi??
+?
+?g
+, 
+pci_v?ue
+ );
+
+77 
+v?ue
+ = 
+       `R?d_pci_devi?_?gi??
+?
+?g
+ );
+
+78 i?(
+v?ue
+ !?
+pci_v?ue
+) {
+
+79 
+       `??tf
+("E?? PCI 0x%2"
+PRIX8
+" wr??0x%8"
+PRIX32
+"??d %8"PRIX32"\n", 
+?g
+, 
+pci_v?ue
+, 
+v?ue
+);
+
+81  
+RTEMS_SUCCESSFUL
+;
+
+82 
+       }
+}
+
+88 
+       $SCORE603e_FLASH_E?b?_wr?es
+(
+
+89 
+u?t32_t
+ 
+??
+
+
+92 
+u?t8_t
+ 
+??_v?ue
+;
+
+93 
+u?t32_t
+ 
+pci_v?ue
+;
+
+95 
+??_v?ue
+ = *
+SCORE603E_BOARD_CTRL_REG
+;
+
+96 
+??_v?ue
+ = ctrl_value & 0xbf;
+
+97 *
+SCORE603E_BOARD_CTRL_REG
+ = 
+??_v?ue
+;
+
+99 
+pci_v?ue
+ = 
+       `R?d_pci_devi?_?gi??
+( 0x800000A8 );
+
+100 
+pci_v?ue
+ |= 0x00001000;
+
+101 
+       `Wr?e_pci_devi?_?gi??
+?0x800000A8, 
+pci_v?ue
+ );
+
+103 
+pci_v?ue
+ = 
+       `R?d_pci_devi?_?gi??
+( 0x800000AC );
+
+104 
+pci_v?ue
+ &= (~0x02000000);
+
+105 
+       `Wr?e_pci_devi?_?gi??
+?0x000000AC, 
+pci_v?ue
+ );
+
+107  
+RTEMS_SUCCESSFUL
+;
+
+108 
+       }
+}
+
+       @PCI_bus/universe.c
+
+10 
+       ~<?ems.h
+>
+
+11 
+       ~<as??.h
+>
+
+12 
+       ~<?dio.h
+>
+
+13 
+       ~<??y?s.h
+>
+
+14 
+       ~<?ems/b?Io.h
+>
+
+16 
+       ~<b?.h
+>
+
+17 
+       ~"PCI.h
+"
+
+20 
+u?t32_t
+ 
+       mPCI_ID
+;
+
+21 
+u?t32_t
+ 
+       mPCI_CSR
+;
+
+22 
+u?t32_t
+ 
+       mPCI_CLASS
+;
+
+23 
+u?t32_t
+ 
+       mPCI_MISC0
+;
+
+24 
+u?t32_t
+ 
+       mPCI_BS
+;
+
+25 
+u?t32_t
+ 
+       mBuf_0x80030014
+[ 0x0A ];
+
+26 
+u?t32_t
+ 
+       mPCI_MISC1
+;
+
+27 
+u?t32_t
+ 
+       mBuf_0x80030040
+[ 0x30 ];
+
+28 
+u?t32_t
+ 
+       mLSI0_CTL
+;
+
+29 
+u?t32_t
+ 
+       mLSI0_BS
+;
+
+30 
+u?t32_t
+ 
+       mLSI0_BD
+;
+
+31 
+u?t32_t
+ 
+       mLSI0_TO
+;
+
+32 
+u?t32_t
+ 
+       mBuf_0x80030110
+;
+
+33 
+u?t32_t
+ 
+       mLSI1_CTL
+;
+
+34 
+u?t32_t
+ 
+       mLSI1_BS
+;
+
+35 
+u?t32_t
+ 
+       mLSI1_BD
+;
+
+36 
+u?t32_t
+ 
+       mLSI1_TO
+;
+
+37 
+u?t32_t
+ 
+       mBuf_0x80030124
+;
+
+38 
+u?t32_t
+ 
+       mLSI2_CTL
+;
+
+39 
+u?t32_t
+ 
+       mLSI2_BS
+;
+
+40 
+u?t32_t
+ 
+       mLSI2_BD
+;
+
+41 
+u?t32_t
+ 
+       mLSI2_TO
+;
+
+42 
+u?t32_t
+ 
+       mBuf_0x80030138
+;
+
+43 
+u?t32_t
+ 
+       mLSI3_CTL
+;
+
+44 
+u?t32_t
+ 
+       mLSI3_BS
+;
+
+45 
+u?t32_t
+ 
+       mLSI3_BD
+;
+
+46 
+u?t32_t
+ 
+       mLSI3_TO
+;
+
+47 
+u?t32_t
+ 
+       mBuf_0x8003014C
+[ 0x09 ];
+
+48 
+u?t32_t
+ 
+       mSCYC_CTL
+;
+
+49 
+u?t32_t
+ 
+       mSCYC_ADDR
+;
+
+50 
+u?t32_t
+ 
+       mSCYC_EN
+;
+
+51 
+u?t32_t
+ 
+       mSCYC_CMP
+;
+
+52 
+u?t32_t
+ 
+       mSCYC_SWP
+;
+
+53 
+u?t32_t
+ 
+       mLMISC
+;
+
+54 
+u?t32_t
+ 
+       mSLSI
+;
+
+55 
+u?t32_t
+ 
+       mL_CMDERR
+;
+
+56 
+u?t32_t
+ 
+       mLAERR
+;
+
+57 
+u?t32_t
+ 
+       mBuf_0x80030194
+[ 0x1B ];
+
+58 
+u?t32_t
+ 
+       mDCTL
+;
+
+59 
+u?t32_t
+ 
+       mDTBC
+;
+
+60 
+u?t32_t
+ 
+       mDLA
+;
+
+61 
+u?t32_t
+ 
+       mBuf_0x8003020C
+;
+
+62 
+u?t32_t
+ 
+       mDVA
+;
+
+63 
+u?t32_t
+ 
+       mBuf_0x80030214
+;
+
+64 
+u?t32_t
+ 
+       mDCPP
+;
+
+65 
+u?t32_t
+ 
+       mBuf_0x8003021C
+;
+
+66 
+u?t32_t
+ 
+       mDGCS
+;
+
+67 
+u?t32_t
+ 
+       mD_LLUE
+;
+
+68 
+u?t32_t
+ 
+       mBuf_0x80030228
+[ 0x36 ];
+
+69 
+u?t32_t
+ 
+       mLINT_EN
+;
+
+70 
+u?t32_t
+ 
+       mLINT_STAT
+;
+
+71 
+u?t32_t
+ 
+       mLINT_MAP0
+;
+
+72 
+u?t32_t
+ 
+       mLINT_MAP1
+;
+
+73 
+u?t32_t
+ 
+       mVINT_EN
+;
+
+74 
+u?t32_t
+ 
+       mVINT_STAT
+;
+
+75 
+u?t32_t
+ 
+       mVINT_MAP0
+;
+
+76 
+u?t32_t
+ 
+       mVINT_MAP1
+;
+
+77 
+u?t32_t
+ 
+       mSTATID
+;
+
+78 
+u?t32_t
+ 
+       mV1_STATID
+;
+
+79 
+u?t32_t
+ 
+       mV2_STATID
+;
+
+80 
+u?t32_t
+ 
+       mV3_STATID
+;
+
+81 
+u?t32_t
+ 
+       mV4_STATID
+;
+
+82 
+u?t32_t
+ 
+       mV5_STATID
+;
+
+83 
+u?t32_t
+ 
+       mV6_STATID
+;
+
+84 
+u?t32_t
+ 
+       mV7_STATID
+;
+
+85 
+u?t32_t
+ 
+       mBuf_0x80030340
+[ 0x30 ];
+
+86 
+u?t32_t
+ 
+       mMAST_CTL
+;
+
+87 
+u?t32_t
+ 
+       mMISC_CTL
+;
+
+88 
+u?t32_t
+ 
+       mMISC_STAT
+;
+
+89 
+u?t32_t
+ 
+       mUSER_AM
+;
+
+90 
+u?t32_t
+ 
+       mBuf_0x80030410
+[ 0x2bc ];
+
+91 
+u?t32_t
+ 
+       mVSI0_CTL
+;
+
+92 
+u?t32_t
+ 
+       mVSI0_BS
+;
+
+93 
+u?t32_t
+ 
+       mVSI0_BD
+;
+
+94 
+u?t32_t
+ 
+       mVSI0_TO
+;
+
+95 
+u?t32_t
+ 
+       mBuf_0x80030f10
+;
+
+96 
+u?t32_t
+ 
+       mVSI1_CTL
+;
+
+97 
+u?t32_t
+ 
+       mVSI1_BS
+;
+
+98 
+u?t32_t
+ 
+       mVSI1_BD
+;
+
+99 
+u?t32_t
+ 
+       mVSI1_TO
+;
+
+100 
+u?t32_t
+ 
+       mBuf_0x80030F24
+;
+
+101 
+u?t32_t
+ 
+       mVSI2_CTL
+;
+
+102 
+u?t32_t
+ 
+       mVSI2_BS
+;
+
+103 
+u?t32_t
+ 
+       mVSI2_BD
+;
+
+104 
+u?t32_t
+ 
+       mVSI2_TO
+;
+
+105 
+u?t32_t
+ 
+       mBuf_0x80030F38
+;
+
+106 
+u?t32_t
+ 
+       mVSI3_CTL
+;
+
+107 
+u?t32_t
+ 
+       mVSI3_BS
+;
+
+108 
+u?t32_t
+ 
+       mVSI3_BD
+;
+
+109 
+u?t32_t
+ 
+       mVSI3_TO
+;
+
+110 
+u?t32_t
+ 
+       mBuf_0x80030F4C
+[ 0x9 ];
+
+111 
+u?t32_t
+ 
+       mVRAI_CTL
+;
+
+112 
+u?t32_t
+ 
+       mVRAI_BS
+;
+
+113 
+u?t32_t
+ 
+       mBuf_0x80030F78
+[ 0x2 ];
+
+114 
+u?t32_t
+ 
+       mVCSR_CTL
+;
+
+115 
+u?t32_t
+ 
+       mVCSR_TO
+;
+
+116 
+u?t32_t
+ 
+       mV_AMERR
+;
+
+117 
+u?t32_t
+ 
+       mVAERR
+;
+
+118 
+u?t32_t
+ 
+       mBuf_0x80030F90
+[ 0x19 ];
+
+119 
+u?t32_t
+ 
+       mVCSR_CLR
+;
+
+120 
+u?t32_t
+ 
+       mVCSR_SET
+;
+
+121 
+u?t32_t
+ 
+       mVCSR_BS
+;
+
+122 } 
+       tUniv??_Mem?y
+;
+
+124 v????
+Univ??_Mem?y
+ *
+       gUNIVERSE
+ =
+
+125 (v????
+Univ??_Mem?y
+ *)
+SCORE603E_UNIVERSE_BASE
+;
+
+140 
+       $???lize_univ??
+()
+
+142 
+u?t32_t
+ 
+jum?r_???i?
+;
+
+143 
+u?t32_t
+ 
+pci_id
+;
+
+148 
+jum?r_???i?
+ = 
+       `PCI_bus_?ad
+(
+
+149 (v????
+u?t32_t
+*)
+SCORE603E_VME_JUMPER_ADDR
+ );
+
+150 
+       `??tk
+("initialize_universe: Read 0x%x = 0x%x\n",
+
+151 
+SCORE603E_VME_JUMPER_ADDR
+, 
+jum?r_???i?
+);
+
+152 
+jum?r_???i?
+ = (jumper_selection >> 3) & 0x1f;
+
+157 
+pci_id
+ = 
+       `R?d_pci_devi?_?gi??
+?
+SCORE603E_IO_VME_UNIVERSE_BASE
+ );
+
+162 i?(
+pci_id
+ !?
+SCORE603E_UNIVERSE_CHIP_ID
+ ){
+
+163 
+       `??tk
+ ("Inv?id SCORE603E_UNIVERSE_CHIP_ID: 0x08%" 
+PRId32
+ "\n", 
+pci_id
+);
+
+164 
+       `?ems_??l_?r?_occu?ed
+( 0x603e0bad );
+
+166 
+       `??tk
+("initialize_universe: Reg 0x%x?ead 0x%x\n",
+
+167 
+SCORE603E_IO_VME_UNIVERSE_BASE
+, 
+pci_id
+ );
+
+173 
+       }
+}
+
+180 
+       $?t_vme_ba?_add?ss
+ (
+
+181 
+u?t32_t
+ 
+ba?_add?ss
+
+
+184 v????
+u?t32_t
+ 
+?mp
+;
+
+189 
+?mp
+ = ( 
+       `PCI_bus_?ad
+?&
+UNIVERSE
+->
+VSI0_BD
+) & 0xFFFFF000) -
+
+190 ?
+       `PCI_bus_?ad
+?&
+UNIVERSE
+->
+VSI0_BS
+) & 0xFFFFF000);
+
+196 
+       `PCI_bus_wr?e
+?&
+UNIVERSE
+->
+VSI0_BS
+, (
+ba?_add?ss
+ & 0xFFFFF000) );
+
+201 
+       `PCI_bus_wr?e
+?&
+UNIVERSE
+->
+VSI0_BD
+, 
+?mp
+ );
+
+206 
+?mp
+ = 0xFFFFFFFF - (
+ba?_add?ss
+ & 0xFFFFF000) + 1 + 0x80000000;
+
+207 
+       `PCI_bus_wr?e
+?&
+UNIVERSE
+->
+VSI0_TO
+, 
+?mp
+ );
+
+208 
+       }
+}
+
+213 
+u?t32_t
+ 
+       $g?_vme_ba?_add?ss
+ ()
+
+215 v????
+u?t32_t
+ 
+?mp
+;
+
+217 
+?mp
+ = 
+       `PCI_bus_?ad
+?&
+UNIVERSE
+->
+VSI0_BS
+ );
+
+218 
+?mp
+ &= 0xFFFFF000;
+
+219  (
+?mp
+);
+
+220 
+       }
+}
+
+222 
+u?t32_t
+ 
+       $g?_vme_?ave_size
+()
+
+224 v????
+u?t32_t
+ 
+?mp
+;
+
+225 
+?mp
+ = 
+       `PCI_bus_?ad
+?&
+UNIVERSE
+->
+VSI0_BD
+);
+
+226 
+?mp
+ &= 0xFFFFF000;
+
+227 
+?mp
+ =?em?- 
+       `g?_vme_ba?_add?ss
+ ();
+
+228  
+?mp
+;
+
+229 
+       }
+}
+
+235 
+       $?t_vme_?ave_size
+ (
+u?t32_t
+ 
+size
+)
+
+237 v????
+u?t32_t
+ 
+?mp
+;
+
+239 i?(
+size
+<0)
+
+240 
+size
+ = 0;
+
+242 i?(
+size
+ > 0x17FFFFF)
+
+243 
+size
+ = 0x17FFFFF;
+
+248 
+?mp
+ = 
+       `g?_vme_ba?_add?ss
+ ();
+
+253 
+?mp
+ =?em?+ (
+size
+ & 0xFFFFF000);
+
+254 
+       `PCI_bus_wr?e
+?&
+UNIVERSE
+->
+VSI0_BD
+, 
+?mp
+ );
+
+255 
+       }
+}
+
+       @console/85c30.c
+
+17 
+       ~<?ems.h
+>
+
+18 
+       ~<b?.h
+>
+
+19 
+       ~<?ems/libio.h
+>
+
+20 
+       ~<as??.h
+>
+
+22 
+       ~"85c30.h
+"
+
+23 
+       ~"c?s?eb?.h
+"
+
+25 
+       #STATUS_REGISTER
+ 0x00
+
+       )
+
+26 
+       #DATA_REGISTER
+ 0x08
+
+       )
+
+28 
+       #Z8530_S?tus_Is_RX_ch?a??_ava?ab?
+?
+_??us
+ ) \
+
+29 ?(
+_??us
+?& 0x01 )
+
+       )
+
+31 
+       #Z8530_S?tus_Is_TX_buf?r_em?y
+?
+_??us
+ ) \
+
+32 ?(
+_??us
+?& 0x04 )
+
+       )
+
+34 
+       #Z8530_S?tus_Is_b?ak_ab?t
+?
+_??us
+ ) \
+
+35 ?(
+_??us
+?& 0x80 )
+
+       )
+
+38 
+       m?ad_?tup
+;
+
+39 
+       mwr?e_?tup
+;
+
+40 
+       mmask_v?ue
+;
+
+41 } 
+       tch?_size_?fo
+;
+
+43 c?? 
+ch?_size_?fo
+ 
+       gCh?_size_85c30
+[] = {
+
+44 { 
+Z8530_READ_CHARACTER_BITS_8
+, 
+Z8530_WRITE_CHARACTER_BITS_8
+, 0xFF },
+
+45 { 
+Z8530_READ_CHARACTER_BITS_7
+, 
+Z8530_WRITE_CHARACTER_BITS_7
+, 0x7F },
+
+46 { 
+Z8530_READ_CHARACTER_BITS_6
+, 
+Z8530_WRITE_CHARACTER_BITS_6
+, 0x3F },
+
+47 { 
+Z8530_READ_CHARACTER_BITS_5
+, 
+Z8530_WRITE_CHARACTER_BITS_5
+, 0x1F }
+
+50 c?? 
+       gClock_??d_85c30
+[] = {
+
+51 
+Z8530_x1_CLOCK
+, 
+Z8530_x16_CLOCK
+, 
+Z8530_x32_CLOCK
+, 
+Z8530_x64_CLOCK
+ };
+
+53 c?? 
+       gSt?_b?_85c30
+[] = {
+
+54 
+Z8530_STOP_BITS_1
+, 
+Z8530_STOP_BITS_1_AND_A_HALF
+, 
+Z8530_STOP_BITS_2
+ };
+
+56 c?? 
+       gP??y_85c30
+[] = {
+
+57 
+Z8530_PARITY_NONE
+, 
+Z8530_PARITY_ODD
+, 
+Z8530_PARITY_EVEN
+ };
+
+65 
+       $R?d_85c30_?gi??
+(
+
+66 v????*
+c?
+,
+
+67 
+?gi??_numb?
+
+
+70 
+D?a
+;
+
+72 *
+c?
+ = 
+?gi??_numb?
+;
+
+74 
+       `?ems_b?_d?ay_?_bus_cy?es
+( 40 );
+
+76 
+D?a
+ = *
+c?
+;
+
+78 
+       `?ems_b?_d?ay_?_bus_cy?es
+( 40 );
+
+80  
+D?a
+;
+
+81 
+       }
+}
+
+88 
+       $Wr?e_85c30_?gi??
+(
+
+89 v????*
+c?
+,
+
+90 
+?gi??_numb?
+,
+
+91 
+d?a
+
+
+94 *
+c?
+ = 
+?gi??_numb?
+;
+
+96 
+       `?ems_b?_d?ay_?_bus_cy?es
+( 40 );
+
+97 *
+c?
+ = 
+d?a
+;
+
+98 
+       `?ems_b?_d?ay_?_bus_cy?es
+( 40 );
+
+99 
+       }
+}
+
+108 
+       $Re?t_85c30_ch?
+(
+
+109 v????*
+??_0
+,
+
+110 v????*
+??_1
+
+
+113 
+       `Wr?e_85c30_?gi??
+?
+??_0
+, 0x09, 0x80 );
+
+114 
+       `Wr?e_85c30_?gi??
+?
+??_1
+, 0x09, 0x40 );
+
+115 
+       }
+}
+
+123 
+       $???lize_85c30_p?t
+(
+
+124 c?? 
+P?t_85C30_?fo
+ *
+P?t
+
+
+127 
+u?t16_t
+ 
+v?ue
+;
+
+128 v????*
+??
+;
+
+129 
+C?s?e_Pr?oc?
+ *
+S?up
+;
+
+130 
+u?t16_t
+ 
+baud_c???t
+;
+
+132 
+S?up
+ = 
+P?t
+->
+Pr?oc?
+;
+
+133 
+??
+ = 
+P?t
+->ctrl;
+
+135 
+baud_c???t
+ = 
+       `_Sc?e603e_Z8530_Baud
+?
+P?t
+->
+Ch?
+->
+?ock_?equ?cy
+,
+
+136 
+P?t
+->
+Ch?
+->
+?ock_x
+, 
+S?up
+->
+baud_??
+ );
+
+142 
+v?ue
+ = 
+Clock_??d_85c30
+[ 
+P?t
+->
+Ch?
+->
+?ock_??d
+ ] |
+
+143 
+St?_b?_85c30
+[ 
+S?up
+->
+??_b?s
+ ] |
+
+144 
+P??y_85c30
+[ 
+S?up
+->
+?r?y
+ ];
+
+145 
+       `Wr?e_85c30_?gi??
+?
+??
+, 0x04, 
+v?ue
+ );
+
+150 
+       `Wr?e_85c30_?gi??
+?
+??
+, 1, 0 );
+
+152 #i?
+CONSOLE_USE_INTERRUPTS
+
+
+156 
+       `Wr?e_85c30_?gi??
+?
+??
+, 2, 
+P?t
+->
+Ch?
+->
+ve??
+ );
+
+162 
+       `Wr?e_85c30_?gi??
+?
+??
+, 0x03, 0x00 );
+
+167 
+       `Wr?e_85c30_?gi??
+?
+??
+, 5, 0x00 );
+
+176 
+       `Wr?e_85c30_?gi??
+?
+??
+, 9, 0x00 );
+
+181 
+       `Wr?e_85c30_?gi??
+?
+??
+, 0x0a, 0x00 );
+
+188 
+       `Wr?e_85c30_?gi??
+?
+??
+, 0x0b, 0x56 );
+
+190 
+v?ue
+ = 
+baud_c???t
+;
+
+197 
+       `Wr?e_85c30_?gi??
+?
+??
+, 0x0c, 
+v?ue
+ & 0xff );
+
+203 
+       `Wr?e_85c30_?gi??
+?
+??
+, 0x0d, 
+v?ue
+>>8 );
+
+211 
+       `Wr?e_85c30_?gi??
+?
+??
+, 0x0e, 0x07 );
+
+223 
+v?ue
+ = 0x01;
+
+224 
+v?ue
+ = v?u?| 
+Ch?_size_85c30
+[ 
+S?up
+->
+?ad_ch?_b?s
+ ].
+?ad_?tup
+;
+
+226 
+       `Wr?e_85c30_?gi??
+?
+??
+, 0x03, 
+v?ue
+ );
+
+238 
+v?ue
+ = 0x8a;
+
+239 
+v?ue
+ = v?u?| 
+Ch?_size_85c30
+[ 
+S?up
+->
+wr?e_ch?_b?s
+ ].
+wr?e_?tup
+;
+
+240 
+       `Wr?e_85c30_?gi??
+?
+??
+, 0x05, 
+v?ue
+ );
+
+246 
+       `Wr?e_85c30_?gi??
+?
+??
+, 0x00, 0xf0 );
+
+248 #i?
+CONSOLE_USE_INTERRUPTS
+
+
+252 
+       `Wr?e_85c30_?gi??
+?
+??
+, 1, 0x10 );
+
+259 
+       `Wr?e_85c30_?gi??
+?
+??
+, 15, 0x00 );
+
+264 
+       `Wr?e_85c30_?gi??
+?
+??
+, 0x00, 0x10 );
+
+266 #i?
+CONSOLE_USE_INTERRUPTS
+
+
+274 
+       `Wr?e_85c30_?gi??
+?
+??
+, 1, 0x16 );
+
+280 
+       `Wr?e_85c30_?gi??
+?
+??
+, 9, 0x0A );
+
+287 
+       `Wr?e_85c30_?gi??
+?
+P?t
+->
+??
+, 
+STATUS_REGISTER
+, 0x38 );
+
+291 
+       }
+}
+
+300 
+       $outby?_p??d_85c30
+(
+
+301 v????*
+c?
+,
+
+302 
+ch
+
+
+305 
+z8530_??us
+;
+
+306 
+u?t32_t
+ 
+i??v?
+;
+
+308 
+       `?ems_???u?_di?b?
+?
+i??v?
+ );
+
+314 
+z8530_??us
+ = 
+       `R?d_85c30_?gi??
+?
+c?
+, 
+STATUS_REGISTER
+ );
+
+315 }  !
+       `Z8530_S?tus_Is_TX_buf?r_em?y
+?
+z8530_??us
+ ) );
+
+320 
+       `Wr?e_85c30_?gi??
+?
+c?
+, 
+DATA_REGISTER
+, (?
+ch
+ );
+
+322 
+       `?ems_???u?_?ab?
+?
+i??v?
+ );
+
+323 
+       }
+}
+
+332 
+       $?by?_n?block?g_85c30
+(
+
+333 c?? 
+P?t_85C30_?fo
+ *
+P?t
+
+
+336 v????*
+c?
+;
+
+337 
+z8530_??us
+;
+
+338 
+u?t8_t
+ 
+d?a
+;
+
+340 
+c?
+ = 
+P?t
+->
+??
+;
+
+345 
+z8530_??us
+ = 
+       `R?d_85c30_?gi??
+?
+c?
+, 
+STATUS_REGISTER
+ );
+
+346 i??!
+       `Z8530_S?tus_Is_RX_ch?a??_ava?ab?
+?
+z8530_??us
+ ) )
+
+352 
+d?a
+ = 
+       `R?d_85c30_?gi??
+?
+c?
+, 
+DATA_REGISTER
+ );
+
+353 
+d?a
+ &?
+Ch?_size_85c30
+[ 
+P?t
+->
+Pr?oc?
+->
+?ad_ch?_b?s
+ ].
+mask_v?ue
+;
+
+355  
+d?a
+;
+
+356 
+       }
+}
+
+362 #i?
+CONSOLE_USE_INTERRUPTS
+
+
+369 
+?ems_i?
+ 
+       $ISR_85c30_Async
+(
+
+370 c?? 
+P?t_85C30_?fo
+ *
+P?t
+
+
+373 
+u?t16_t
+ 
+??us
+;
+
+374 v????
+C?s?e_Pr?oc?
+ *
+Pr?oc?
+;
+
+375 
+d?a
+;
+
+376 
+bo?
+ 
+did_som?h?g
+ = 
+?l?
+;
+
+378 
+Pr?oc?
+ = 
+P?t
+->Protocol;
+
+380 
+??us
+ = 
+       `R?d_85c30_?gi??
+?
+P?t
+->
+??
+, 0x00 );
+
+386 i??
+       `Z8530_S?tus_Is_RX_ch?a??_ava?ab?
+?
+??us
+ ) ) {
+
+387 
+d?a
+ = 
+       `R?d_85c30_?gi??
+?
+P?t
+->
+??
+, 
+DATA_REGISTER
+ );
+
+388 
+d?a
+ &?
+Ch?_size_85c30
+[ 
+P?t
+->
+Pr?oc?
+->
+?ad_ch?_b?s
+ ].
+mask_v?ue
+;
+
+390 
+       `?ems_?rmios_?queue_?w_ch?a??s
+?
+P?t
+->
+Pr?oc?
+->
+c?s?e_?rmios_d?a
+,
+
+391 &
+d?a
+, 1 );
+
+392 
+did_som?h?g
+ = 
+?ue
+;
+
+399 i?(
+       `Z8530_S?tus_Is_TX_buf?r_em?y
+?
+??us
+ ) ) {
+
+400 i??!
+       `R?g_buf?r_Is_em?y
+?&
+Pr?oc?
+->
+TX_Buf?r
+ ) ) {
+
+401 
+       `R?g_buf?r_Remove_ch?a??
+?&
+Pr?oc?
+->
+TX_Buf?r
+, 
+d?a
+ );
+
+402 
+       `Wr?e_85c30_?gi??
+?
+P?t
+->
+??
+, 
+DATA_REGISTER
+, 
+d?a
+ );
+
+405 
+Pr?oc?
+->
+Is_TX_a?ive
+ = 
+?l?
+;
+
+406 
+       `Wr?e_85c30_?gi??
+?
+P?t
+->
+??
+, 
+STATUS_REGISTER
+, 0x28 );
+
+409 
+did_som?h?g
+ = 
+?ue
+;
+
+419 
+       `Wr?e_85c30_?gi??
+?
+P?t
+->
+??
+, 
+STATUS_REGISTER
+, 0x38 );
+
+420 
+       }
+}
+
+       @console/85c30.h
+
+13 #i?de?
+__85c30_H
+
+
+14 
+       #__85c30_H
+
+
+       )
+
+20 
+       #Z8530_x1_CLOCK
+ 0x00
+
+       )
+
+21 
+       #Z8530_x16_CLOCK
+ 0x40
+
+       )
+
+22 
+       #Z8530_x32_CLOCK
+ 0x80
+
+       )
+
+23 
+       #Z8530_x64_CLOCK
+ 0xC0
+
+       )
+
+28 
+       #Z8530_STOP_BITS_1
+ 0x04
+
+       )
+
+29 
+       #Z8530_STOP_BITS_1_AND_A_HALF
+ 0x08
+
+       )
+
+30 
+       #Z8530_STOP_BITS_2
+ 0x0C
+
+       )
+
+35 
+       #Z8530_PARITY_NONE
+ 0x00
+
+       )
+
+36 
+       #Z8530_PARITY_ODD
+ 0x01
+
+       )
+
+37 
+       #Z8530_PARITY_EVEN
+ 0x03
+
+       )
+
+42 
+       #Z8530_READ_CHARACTER_BITS_8
+ 0xC0
+
+       )
+
+43 
+       #Z8530_READ_CHARACTER_BITS_7
+ 0x40
+
+       )
+
+44 
+       #Z8530_READ_CHARACTER_BITS_6
+ 0x80
+
+       )
+
+45 
+       #Z8530_READ_CHARACTER_BITS_5
+ 0x00
+
+       )
+
+47 
+       #Z8530_WRITE_CHARACTER_BITS_8
+ 0x60
+
+       )
+
+48 
+       #Z8530_WRITE_CHARACTER_BITS_7
+ 0x20
+
+       )
+
+49 
+       #Z8530_WRITE_CHARACTER_BITS_6
+ 0x40
+
+       )
+
+50 
+       #Z8530_WRITE_CHARACTER_BITS_5
+ 0x00
+
+       )
+
+       @console/console.c
+
+18 
+       ~<b?.h
+>
+
+19 
+       ~<?ems/libio.h
+>
+
+20 
+       ~<?dlib.h
+>
+
+21 
+       ~<as??.h
+>
+
+23 
+       ~"c?s?eb?.h
+"
+
+24 
+       ~<?ems/b?Io.h
+>
+
+33 
+       #USE_FOR_CONSOLE_DEF
+ 0
+
+       )
+
+34 
+       gUSE_FOR_CONSOLE
+ = 
+USE_FOR_CONSOLE_DEF
+;
+
+46 
+       $c?s?e_?by?_n?block?g
+(
+
+47 
+m??
+
+
+50 
+p?t
+ = 
+m??
+;
+
+55 
+       `as??
+ ( 
+p?t
+ < 
+NUM_Z85C30_PORTS
+ );
+
+60  
+       `?by?_n?block?g_85c30
+?&
+P?ts_85C30
+[ 
+p?t
+ ] );
+
+61 
+       }
+}
+
+63 
+?ems_devi?_driv?
+ 
+       $c?s?e_?o?
+(
+
+64 
+?ems_devi?_maj?_numb?
+ 
+maj?
+,
+
+65 
+?ems_devi?_m??_numb?
+ 
+m??
+,
+
+66 * 
+?g
+
+
+69  
+       `?ems_?rmios_?o?
+ (
+?g
+);
+
+70 
+       }
+}
+
+72 
+?ems_devi?_driv?
+ 
+       $c?s?e_?ad
+(
+
+73 
+?ems_devi?_maj?_numb?
+ 
+maj?
+,
+
+74 
+?ems_devi?_m??_numb?
+ 
+m??
+,
+
+75 * 
+?g
+
+
+78  
+       `?ems_?rmios_?ad
+ (
+?g
+);
+
+79 
+       }
+}
+
+81 
+?ems_devi?_driv?
+ 
+       $c?s?e_wr?e
+(
+
+82 
+?ems_devi?_maj?_numb?
+ 
+maj?
+,
+
+83 
+?ems_devi?_m??_numb?
+ 
+m??
+,
+
+84 * 
+?g
+
+
+87  
+       `?ems_?rmios_wr?e
+ (
+?g
+);
+
+88 
+       }
+}
+
+90 
+?ems_devi?_driv?
+ 
+       $c?s?e_c???
+(
+
+91 
+?ems_devi?_maj?_numb?
+ 
+maj?
+,
+
+92 
+?ems_devi?_m??_numb?
+ 
+m??
+,
+
+93 * 
+?g
+
+
+96  
+       `?ems_?rmios_io?l
+ (
+?g
+);
+
+97 
+       }
+}
+
+103 #i?
+CONSOLE_USE_INTERRUPTS
+
+
+105 
+?ems_i?
+ 
+       $c?s?e_i?
+(
+
+106 
+?ems_ve??_numb?
+ 
+ve??
+
+
+109 
+i
+;
+
+111 
+i
+=0; i < 
+NUM_Z85C30_PORTS
+; i++){
+
+112 
+       `ISR_85c30_Async
+?&
+P?ts_85C30
+[
+i
+] );
+
+114 
+       }
+}
+
+116 
+       $c?s?e_ex?
+()
+
+118 
+i
+;
+
+119 v????
+R?g_buf?r_t
+ *
+buf?r
+;
+
+120 
+u?t32_t
+ 
+ch
+;
+
+122  
+i
+=0 ; i < 
+NUM_Z85C30_PORTS
+ ; i++ ) {
+
+124 
+buf?r
+ = &?
+P?ts_85C30
+[
+i
+].
+Pr?oc?
+->
+TX_Buf?r
+);
+
+126  !
+       `R?g_buf?r_Is_em?y
+?
+buf?r
+ ) ) {
+
+127 
+       `R?g_buf?r_Remove_ch?a??
+?
+buf?r
+, 
+ch
+ );
+
+128 
+       `outby?_p??d_85c30
+?
+P?ts_85C30
+[
+i
+].
+??
+, 
+ch
+ );
+
+131 
+       }
+}
+
+133 
+       $c?s?e_???lize_???u?s
+( )
+
+135 v????
+R?g_buf?r_t
+ *
+buf?r
+;
+
+136 
+C?s?e_Pr?oc?
+ *
+??oc?
+;
+
+137 
+i
+;
+
+139  
+i
+=0 ; i < 
+NUM_Z85C30_PORTS
+ ; i++ ) {
+
+140 
+??oc?
+ = 
+P?ts_85C30
+[
+i
+].
+Pr?oc?
+;
+
+145 
+buf?r
+ = &
+??oc?
+->
+TX_Buf?r
+;
+
+146 
+       `R?g_buf?r_In??lize
+?
+buf?r
+ );
+
+147 
+??oc?
+->
+Is_TX_a?ive
+ = 
+?l?
+;
+
+153 
+i
+=0; i < 
+NUM_Z85C30_CHIPS
+; i++)
+
+154 
+       `?t_ve??
+?
+c?s?e_i?
+, 
+Ch?s_85C30
+[
+i
+].
+ve??
+, 1 );
+
+157 
+       `?ex?
+?
+c?s?e_ex?
+ );
+
+159 
+       }
+}
+
+160 
+c?s?e_outby?_???u?s
+(
+
+161 c?? 
+P?t_85C30_?fo
+ *
+P?t
+,
+
+162 
+ch
+
+
+172 
+?ems_devi?_driv?
+ 
+       $c?s?e_???lize
+(
+
+173 
+?ems_devi?_maj?_numb?
+ 
+maj?
+,
+
+174 
+?ems_devi?_m??_numb?
+ 
+m??
+,
+
+175 *
+?g
+
+
+178 
+?ems_??us_code
+ 
+??us
+;
+
+179 
+?ems_devi?_m??_numb?
+ 
+c?s?e
+;
+
+180 
+p?t
+, 
+p0
+,
+p1
+;
+
+185 
+       `?ems_?rmios_???lize
+();
+
+190 
+c?s?e
+ = 
+USE_FOR_CONSOLE
+;
+
+191 
+??us
+ = 
+       `?ems_io_?gi??_?me
+?"/dev/c?s?e", 
+maj?
+, 
+c?s?e
+ );
+
+192 i?(
+??us
+ !?
+RTEMS_SUCCESSFUL
+)
+
+193 
+       `?ems_??l_?r?_occu?ed
+(
+??us
+);
+
+205 #i??
+INITIALIZE_COM_PORTS
+ )
+
+211 
+p?t
+=0;??t<
+NUM_Z85C30_PORTS
+;?ort++){
+
+212 
+p0
+ = 
+p?t
+;
+
+213 
+p?t
+++;
+
+214 
+p1
+ = 
+p?t
+;
+
+215 
+       `Re?t_85c30_ch?
+?
+P?ts_85C30
+[
+p0
+].
+??
+, P?ts_85C30[
+p1
+].ctrl );
+
+221 
+p?t
+=2;??t<
+NUM_Z85C30_PORTS
+;?ort++){
+
+222 
+p0
+ = 
+p?t
+;
+
+223 
+p?t
+++;
+
+224 
+p1
+ = 
+p?t
+;
+
+225 
+       `Re?t_85c30_ch?
+?
+P?ts_85C30
+[
+p0
+].
+??
+, P?ts_85C30[
+p1
+].ctrl );
+
+235 
+p?t
+=1;??t<
+NUM_Z85C30_PORTS
+;?ort++) {
+
+236 
+       `???lize_85c30_p?t
+?&
+P?ts_85C30
+[
+p?t
+] );
+
+239 #i?
+CONSOLE_USE_INTERRUPTS
+
+
+240 
+       `c?s?e_???lize_???u?s
+();
+
+243  
+RTEMS_SUCCESSFUL
+;
+
+244 
+       }
+}
+
+252 
+ssize_t
+ 
+       $c?s?e_wr?e_su??t
+(
+
+253 
+m??
+,
+
+254 c?? *
+buf
+,
+
+255 
+size_t
+ 
+?n
+)
+
+257 
+nwr?e
+ = 0;
+
+258 v????
+u?t8_t
+ *
+c?
+;
+
+259 
+p?t
+ = 
+m??
+;
+
+264 
+       `as??
+ ( 
+p?t
+ < 
+NUM_Z85C30_PORTS
+ );
+
+269 
+c?
+ = 
+P?ts_85C30
+[ 
+p?t
+ ].
+??
+;
+
+274 
+nwr?e
+ < 
+?n
+) {
+
+275 #i?(
+CONSOLE_USE_INTERRUPTS
+)
+
+276 
+       `c?s?e_outby?_???u?s
+?&
+P?ts_85C30
+[ 
+p?t
+ ], *
+buf
+++ );
+
+278 
+       `outby?_p??d_85c30
+?
+c?
+, *
+buf
+++ );
+
+280 
+nwr?e
+++;
+
+286  
+nwr?e
+;
+
+287 
+       }
+}
+
+294 
+?ems_devi?_driv?
+ 
+       $c?s?e_??
+(
+
+295 
+?ems_devi?_maj?_numb?
+ 
+maj?
+,
+
+296 
+?ems_devi?_m??_numb?
+ 
+m??
+,
+
+297 * 
+?g
+
+
+300 
+?ems_??us_code
+ 
+sc
+;
+
+301 
+p?t
+ = 
+m??
+;
+
+302 #i?(
+CONSOLE_USE_INTERRUPTS
+)
+
+303 
+?ems_libio_??_?o?_?gs_t
+ *
+?gs
+ = 
+?g
+;
+
+304 c?? 
+?ems_?rmios_??backs
+ 
+??C?lbacks
+ = {
+
+305 
+NULL
+,
+
+306 
+NULL
+,
+
+307 
+NULL
+,
+
+308 
+c?s?e_wr?e_su??t
+,
+
+309 
+NULL
+,
+
+310 
+NULL
+,
+
+311 
+NULL
+,
+
+315 c?? 
+?ems_?rmios_??backs
+ 
+p?lC?lbacks
+ = {
+
+316 
+NULL
+,
+
+317 
+NULL
+,
+
+318 
+c?s?e_?by?_n?block?g
+,
+
+319 
+c?s?e_wr?e_su??t
+,
+
+320 
+NULL
+,
+
+321 
+NULL
+,
+
+322 
+NULL
+,
+
+330 i?(
+m??
+ < 0)
+
+331  
+RTEMS_INVALID_NUMBER
+;
+
+333 i??
+p?t
+ > 
+NUM_Z85C30_PORTS
+ )
+
+334  
+RTEMS_INVALID_NUMBER
+;
+
+340 #i?(
+CONSOLE_USE_INTERRUPTS
+)
+
+341 
+sc
+ = 
+       `?ems_?rmios_??
+?
+maj?
+, 
+m??
+, 
+?g
+, &
+??C?lbacks
+ );
+
+343 
+P?ts_85C30
+[ 
+m??
+ ].
+Pr?oc?
+->
+c?s?e_?rmios_d?a
+ = 
+?gs
+->
+i?
+->
+d?a1
+;
+
+345 
+sc
+ = 
+       `?ems_?rmios_??
+?
+maj?
+, 
+m??
+, 
+?g
+, &
+p?lC?lbacks
+ );
+
+348  
+sc
+;
+
+349 
+       }
+}
+
+351 #i?(
+CONSOLE_USE_INTERRUPTS
+)
+
+357 
+       $c?s?e_outby?_???u?s
+(
+
+358 c?? 
+P?t_85C30_?fo
+ *
+P?t
+,
+
+359 
+ch
+
+
+362 
+C?s?e_Pr?oc?
+ *
+??oc?
+;
+
+363 
+u?t32_t
+ 
+i??v?
+;
+
+365 
+??oc?
+ = 
+P?t
+->
+Pr?oc?
+;
+
+371 i??
+??oc?
+->
+Is_TX_a?ive
+ =?
+?l?
+ ) {
+
+373 
+       `?ems_???u?_di?b?
+?
+i??v?
+ );
+
+374 
+??oc?
+->
+Is_TX_a?ive
+ = 
+?ue
+;
+
+375 
+       `outby?_p??d_85c30
+?
+P?t
+->
+??
+, 
+ch
+ );
+
+376 
+       `?ems_???u?_?ab?
+?
+i??v?
+ );
+
+381  
+       `R?g_buf?r_Is_fu?
+?&
+??oc?
+->
+TX_Buf?r
+ ) );
+
+383 
+       `R?g_buf?r_Add_ch?a??
+?&
+??oc?
+->
+TX_Buf?r
+, 
+ch
+ );
+
+384 
+       }
+}
+
+388 
+       $debug_putc_?l?
+(c?? 
+c
+)
+
+390 
+c?s?e
+;
+
+391 v????
+u?t8_t
+ *
+c?
+;
+
+392 
+u?t32_t
+ 
+i??v?
+;
+
+394 
+c?s?e
+ = 
+USE_FOR_CONSOLE
+;
+
+395 
+c?
+ = 
+P?ts_85C30
+[ 
+c?s?e
+ ].
+??
+;
+
+397 i?('\n'==
+c
+){
+
+398 
+       `?ems_???u?_di?b?
+?
+i??v?
+ );
+
+399 
+       `outby?_p??d_85c30
+?
+c?
+, '\r' );
+
+400 
+__asm__
+ volatile("isync");
+
+401 
+       `?ems_???u?_?ab?
+?
+i??v?
+ );
+
+404 
+       `?ems_???u?_di?b?
+?
+i??v?
+ );
+
+405 
+       `outby?_p??d_85c30
+?
+c?
+, 
+c
+ );
+
+406 
+__asm__
+ volatile("isync");
+
+407 
+       `?ems_???u?_?ab?
+?
+i??v?
+ );
+
+408 
+       }
+}
+
+410 
+BSP_ou?ut_ch?_fun?i?_ty?
+ 
+       gBSP_ou?ut_ch?
+ = 
+debug_putc_?l?
+;
+
+411 
+BSP_p?l?g_g?ch?_fun?i?_ty?
+ 
+       gBSP_p?l_ch?
+ = 
+NULL
+;
+
+       @console/consolebsp.h
+
+13 #i?de?
+__CONSOLEBSP_H
+
+
+14 
+       #__CONSOLEBSP_H
+
+
+       )
+
+16 
+       ~<?ems.h
+>
+
+17 
+       ~<?ems/r?gbuf.h
+>
+
+18 
+       ~<b?.h
+>
+
+20 #ifde?
+__?lu?lus
+
+
+35 #i?(
+HAS_PMC_PSC8
+)
+
+36 
+       #NUM_Z85C30_CHIPS_ON_MEZZANINE
+ 4
+
+       )
+
+38 
+       #NUM_Z85C30_CHIPS_ON_MEZZANINE
+ 0
+
+       )
+
+41 
+       #NUM_Z85C30_CHIPS
+ (2 + 
+NUM_Z85C30_CHIPS_ON_MEZZANINE
+)
+
+       )
+
+42 
+       #NUM_Z85C30_PORTS
+ (
+NUM_Z85C30_CHIPS
+ * 2)
+
+       )
+
+45 
+CONSOLE_x1_CLOCK
+,
+
+46 
+CONSOLE_x16_CLOCK
+,
+
+47 
+CONSOLE_x32_CLOCK
+,
+
+48 
+CONSOLE_x64_CLOCK
+,
+
+49 } 
+       tCONSOLE_Clock_??d
+;
+
+52 
+CONSOLE_STOP_BITS_1
+,
+
+53 
+CONSOLE_STOP_BITS_1_AND_A_HALF
+,
+
+54 
+CONSOLE_STOP_BITS_2
+,
+
+55 } 
+       tCONSOLE_St?_b?s
+;
+
+58 
+CONSOLE_PARITY_NONE
+,
+
+59 
+CONSOLE_PARITY_ODD
+,
+
+60 
+CONSOLE_PARITY_EVEN
+,
+
+61 } 
+       tCONSOLE_P??y
+;
+
+64 
+CONSOLE_CHARACTER_BITS_8
+,
+
+65 
+CONSOLE_CHARACTER_BITS_7
+,
+
+66 
+CONSOLE_CHARACTER_BITS_6
+,
+
+67 
+CONSOLE_CHARACTER_BITS_5
+,
+
+68 } 
+       tCONSOLE_Ch?a??_b?s
+;
+
+71 
+u?t32_t
+ 
+baud_??
+;
+
+72 
+CONSOLE_St?_b?s
+ 
+??_b?s
+;
+
+73 
+CONSOLE_P??y
+ 
+?r?y
+;
+
+74 
+CONSOLE_Ch?a??_b?s
+ 
+?ad_ch?_b?s
+;
+
+75 
+CONSOLE_Ch?a??_b?s
+ 
+wr?e_ch?_b?s
+;
+
+77 #i?
+CONSOLE_USE_INTERRUPTS
+
+
+78 v????
+R?g_buf?r_t
+ 
+TX_Buf?r
+;
+
+79 v????
+bo?
+ 
+Is_TX_a?ive
+;
+
+80 *
+c?s?e_?rmios_d?a
+;
+
+83 } 
+       tC?s?e_Pr?oc?
+;
+
+89 
+u?t32_t
+ 
+ve??
+;
+
+90 
+u?t32_t
+ 
+?ock_?equ?cy
+;
+
+91 
+u?t16_t
+ 
+?ock_x
+;
+
+92 
+CONSOLE_Clock_??d
+ 
+?ock_??d
+;
+
+93 } 
+       tCh?_85C30_?fo
+;
+
+100 v????*
+??
+;
+
+101 v????*
+d?a
+;
+
+103 
+p?t
+;
+
+105 
+C?s?e_Pr?oc?
+ *
+Pr?oc?
+;
+
+106 
+Ch?_85C30_?fo
+ *
+Ch?
+;
+
+108 } 
+       tP?t_85C30_?fo
+;
+
+113 
+Ch?_85C30_?fo
+ 
+Ch?s_85C30
+ [ 
+NUM_Z85C30_CHIPS
+ ];
+
+114 
c?? 
+P?t_85C30_?fo
+ 
+P?ts_85C30
+ [ 
+NUM_Z85C30_PORTS
+ ];
+
+119 
+???lize_85c30_p?t
+(
+
+120 c?? 
+P?t_85C30_?fo
+ *
+P?t
+
+
+123 
+outby?_p??d_85c30
+(
+
+124 v????*
+c?
+,
+
+125 
+ch
+
+
+128 
+?by?_n?block?g_85c30
+(
+
+129 c?? 
+P?t_85C30_?fo
+ *
+P?t
+
+
+132 
+Re?t_85c30_ch?
+(
+
+133 v????*
+??_0
+,
+
+134 v????*
+??_1
+
+
+137 #i?
+CONSOLE_USE_INTERRUPTS
+
+
+138 
+?ems_i?
+ 
+ISR_85c30_Async
+(
+
+139 c?? 
+P?t_85C30_?fo
+ *
+P?t
+
+
+142 #ifde?
+__?lu?lus
+
+
+       @console/tbl85c30.c
+
+13 
+       ~"c?s?eb?.h
+"
+
+14 
+       ~<b?.h
+>
+
+15 
+       ~<b?/?q.h
+>
+
+17 
+       #CONSOLE_DEFAULT_BAUD_RATE
+ 9600
+
+       )
+
+18 
+       #CONSOLE_DEFAULT_BAUD_CONSTANT
+ 
+       `Sc?e603e_Z8530_Ch?0_Baud
+(9600)
+
+       )
+
+20 
+       #CONSOLE_DEFAULT_STOP_BITS
+ 
+CONSOLE_STOP_BITS_1
+
+
+       )
+
+21 
+       #CONSOLE_DEFAULT_PARITY
+ 
+CONSOLE_PARITY_NONE
+
+
+       )
+
+22 
+       #CONSOLE_DEFAULT_READ_CHARACTER_BITS
+ 
+CONSOLE_CHARACTER_BITS_8
+
+
+       )
+
+23 
+       #CONSOLE_DEFAULT_WRITE_CHARACTER_BITS
+ 
+CONSOLE_CHARACTER_BITS_8
+
+
+       )
+
+24 
+       #CONSOLE_DEFAULT_CONSOLE_CLOCK
+ 
+CONSOLE_x16_CLOCK
+
+
+       )
+
+26 
+       #DEFAULT_PROTOCOL
+ { 
+CONSOLE_DEFAULT_BAUD_RATE
+, \
+
+27 
+CONSOLE_DEFAULT_STOP_BITS
+, \
+
+28 
+CONSOLE_DEFAULT_PARITY
+, \
+
+29 
+CONSOLE_DEFAULT_READ_CHARACTER_BITS
+, \
+
+30 
+CONSOLE_DEFAULT_WRITE_CHARACTER_BITS
+ }
+
+       )
+
+35 
+C?s?e_Pr?oc?
+ 
+       gPr?oc?s_85c30
+ [ 
+NUM_Z85C30_PORTS
+ ] =
+
+37 
+DEFAULT_PROTOCOL
+,
+
+38 
+DEFAULT_PROTOCOL
+,
+
+39 
+DEFAULT_PROTOCOL
+,
+
+40 
+DEFAULT_PROTOCOL
+,
+
+42 #i?(
+HAS_PMC_PSC8
+)
+
+43 
+DEFAULT_PROTOCOL
+,
+
+44 
+DEFAULT_PROTOCOL
+,
+
+45 
+DEFAULT_PROTOCOL
+,
+
+46 
+DEFAULT_PROTOCOL
+,
+
+47 
+DEFAULT_PROTOCOL
+,
+
+48 
+DEFAULT_PROTOCOL
+,
+
+49 
+DEFAULT_PROTOCOL
+,
+
+50 
+DEFAULT_PROTOCOL
+,
+
+58 
+Ch?_85C30_?fo
+ 
+       gCh?s_85C30
+ [ 
+NUM_Z85C30_CHIPS
+ ] =
+
+61 
+SCORE603E_85C30_0_IRQ
+,
+
+62 
+SCORE603E_85C30_0_CLOCK
+,
+
+63 
+SCORE603E_85C30_0_CLOCK_X
+,
+
+64 
+CONSOLE_DEFAULT_CONSOLE_CLOCK
+
+
+67 
+SCORE603E_85C30_1_IRQ
+,
+
+68 
+SCORE603E_85C30_1_CLOCK
+,
+
+69 
+SCORE603E_85C30_1_CLOCK_X
+,
+
+70 
+CONSOLE_DEFAULT_CONSOLE_CLOCK
+
+
+73 #i?(
+HAS_PMC_PSC8
+)
+
+75 
+SCORE603E_85C30_2_IRQ
+,
+
+76 
+SCORE603E_85C30_2_CLOCK
+,
+
+77 
+SCORE603E_85C30_2_CLOCK_X
+,
+
+78 
+CONSOLE_DEFAULT_CONSOLE_CLOCK
+
+
+81 
+SCORE603E_85C30_3_IRQ
+,
+
+82 
+SCORE603E_85C30_3_CLOCK
+,
+
+83 
+SCORE603E_85C30_3_CLOCK_X
+,
+
+84 
+CONSOLE_DEFAULT_CONSOLE_CLOCK
+
+
+87 
+SCORE603E_85C30_4_IRQ
+,
+
+88 
+SCORE603E_85C30_4_CLOCK
+,
+
+89 
+SCORE603E_85C30_4_CLOCK_X
+,
+
+90 
+CONSOLE_DEFAULT_CONSOLE_CLOCK
+
+
+93 
+SCORE603E_85C30_5_IRQ
+,
+
+94 
+SCORE603E_85C30_5_CLOCK
+,
+
+95 
+SCORE603E_85C30_5_CLOCK_X
+,
+
+96 
+CONSOLE_DEFAULT_CONSOLE_CLOCK
+
+
+106 c?? 
+P?t_85C30_?fo
+ 
+       gP?ts_85C30
+ [ 
+NUM_Z85C30_PORTS
+ ] = {
+
+108 (v????*?
+SCORE603E_85C30_CTRL_0
+,
+
+109 (v????*?
+SCORE603E_85C30_DATA_0
+,
+
+111 &
+Pr?oc?s_85c30
+[0],
+
+112 &
+Ch?s_85C30
+[0],
+
+115 (v????*?
+SCORE603E_85C30_CTRL_1
+,
+
+116 (v????*?
+SCORE603E_85C30_DATA_1
+,
+
+118 &
+Pr?oc?s_85c30
+[1],
+
+119 &
+Ch?s_85C30
+[0],
+
+122 (v????*?
+SCORE603E_85C30_CTRL_2
+,
+
+123 (v????*?
+SCORE603E_85C30_DATA_2
+,
+
+125 &
+Pr?oc?s_85c30
+[2],
+
+126 &
+Ch?s_85C30
+[1],
+
+129 (v????*?
+SCORE603E_85C30_CTRL_3
+,
+
+130 (v????*?
+SCORE603E_85C30_DATA_3
+,
+
+132 &
+Pr?oc?s_85c30
+[3],
+
+133 &
+Ch?s_85C30
+[1],
+
+136 #i?(
+HAS_PMC_PSC8
+)
+
+138 (v????*?
+SCORE603E_85C30_CTRL_4
+,
+
+139 (v????*?
+SCORE603E_85C30_DATA_4
+,
+
+141 &
+Pr?oc?s_85c30
+[4],
+
+142 &
+Ch?s_85C30
+[2],
+
+145 (v????*?
+SCORE603E_85C30_CTRL_5
+,
+
+146 (v????*?
+SCORE603E_85C30_DATA_5
+,
+
+148 &
+Pr?oc?s_85c30
+[5],
+
+149 &
+Ch?s_85C30
+[2],
+
+152 (v????*?
+SCORE603E_85C30_CTRL_6
+,
+
+153 (v????*?
+SCORE603E_85C30_DATA_6
+,
+
+155 &
+Pr?oc?s_85c30
+[6],
+
+156 &
+Ch?s_85C30
+[3],
+
+159 (v????*?
+SCORE603E_85C30_CTRL_7
+,
+
+160 (v????*?
+SCORE603E_85C30_DATA_7
+,
+
+162 &
+Pr?oc?s_85c30
+[7],
+
+163 &
+Ch?s_85C30
+[3],
+
+166 (v????*?
+SCORE603E_85C30_CTRL_8
+,
+
+167 (v????*?
+SCORE603E_85C30_DATA_8
+,
+
+169 &
+Pr?oc?s_85c30
+[8],
+
+170 &
+Ch?s_85C30
+[4],
+
+173 (v????*?
+SCORE603E_85C30_CTRL_9
+,
+
+174 (v????*?
+SCORE603E_85C30_DATA_9
+,
+
+176 &
+Pr?oc?s_85c30
+[9],
+
+177 &
+Ch?s_85C30
+[4],
+
+180 (v????*?
+SCORE603E_85C30_CTRL_10
+,
+
+181 (v????*?
+SCORE603E_85C30_DATA_10
+,
+
+183 &
+Pr?oc?s_85c30
+[10],
+
+184 &
+Ch?s_85C30
+[5],
+
+187 (v????*?
+SCORE603E_85C30_CTRL_11
+,
+
+188 (v????*?
+SCORE603E_85C30_DATA_11
+,
+
+190 &
+Pr?oc?s_85c30
+[11],
+
+191 &
+Ch?s_85C30
+[5],
+
+       @include/bsp.h
+
+14 #i?de?
+_BSP_H
+
+
+15 
+       #_BSP_H
+
+
+       )
+
+17 #ifde?
+__?lu?lus
+
+
+21 
+       #BSP_ZERO_WORKSPACE_AUTOMATICALLY
+ 
+TRUE
+
+
+       )
+
+23 
+       ~<b??ts.h
+>
+
+24 
+       ~<b?/de?u?-???l-ex?nsi?.h
+>
+
+25 
+       ~<?ems.h
+>
+
+26 
+       ~<?ems/c?s?e.h
+>
+
+27 
+       ~<lib?u/io.h
+>
+
+28 
+       ~<?ems/?ockdrv.h
+>
+
+29 
+       ~<b?/ve??s.h
+>
+
+31 #ifde?
+ASM
+
+
+33 
+       #ALIGN_REGS
+ 0x0140
+
+       )
+
+36 
+       ~<?ems.h
+>
+
+37 
+       ~<?ems/c?s?e.h
+>
+
+38 
+       ~<?ems/?ockdrv.h
+>
+
+39 
+       ~<?ems/iosu?.h
+>
+
+45 
+       ~<g?2.h
+>
+
+46 
+       ~<b?/?q.h
+>
+
+54 
+       #_Sc?e603e_Z8530_Baud
+?
+_?equ?cy
+, 
+_?ock_by
+, 
+_baud_??
+ ) \
+
+55 ?(
+_?equ?cy
+ /?
+_?ock_by
+ * 2 * 
+_baud_??
+)?- 2)
+
+       )
+
+57 
+       #Sc?e603e_Z8530_Ch?1_Baud
+?
+_v?ue
+ ) \
+
+58 
+       `_Sc?e603e_Z8530_Baud
+?
+SCORE603E_85C30_1_CLOCK
+, \
+
+59 
+SCORE603E_85C30_1_CLOCK_X
+, 
+_v?ue
+ )
+
+       )
+
+61 
+       #Sc?e603e_Z8530_Ch?0_Baud
+?
+_v?ue
+ ) \
+
+62 
+       `_Sc?e603e_Z8530_Baud
+?
+SCORE603E_85C30_0_CLOCK
+, \
+
+63 
+SCORE603E_85C30_0_CLOCK_X
+, 
+_v?ue
+ )
+
+       )
+
+65 
+       #In??lize_B?rd_??_?gi??
+() \
+
+66 *
+SCORE603E_BOARD_CTRL_REG
+ = (*SCORE603E_BOARD_CTRL_REG | \
+
+67 
+SCORE603E_BRD_FLASH_DISABLE_MASK
+)
+
+       )
+
+69 
+       #Pro?ss?_Synchr?ize
+() \
+
+70 
+__asm__
+ v???e("??i?")
+
+       )
+
+91 

+RAM_START
+;
+
+92 

+RAM_END
+;
+
+93 

+RAM_SIZE
+;
+
+95 

+PROM_START
+;
+
+96 

+PROM_END
+;
+
+97 

+PROM_SIZE
+;
+
+99 

+CLOCK_SPEED
+;
+
+100 

+CPU_PPC_CLICKS_PER_MS
+;
+
+102 

+?d
+;
+
+107 

+?d
+;
+
+108 

+RAM_END
+;
+
+109 
+u?t32_t
+ 
+BSP_mem_size
+;
+
+116 
+       #BSP_LIBIO_MAX_FDS
+ 20
+
+       )
+
+123 
+?ems_i?_??y
+ 
+?t_EE_ve??
+(
+
+124 
+?ems_i?_??y
+ 
+h?d?r
+,
+
+125 
+?ems_ve??_numb?
+ 
+ve??
+
+
+127 
+???lize_ex???_ex??i?_ve??
+();
+
+132 
+??_PCI
+();
+
+133 
+??_RTC
+();
+
+134 
+??ru?i?_?che_?ab?
+();
+
+135 
+d?a_?che_?ab?
+();
+
+137 
+???lize_PCI_bridge
+();
+
+138 
+u?t16_t
+ 
+?ad_?d_??r_?q
+();
+
+139 
+?t_?q_mask
+(
+u?t16_t
+ 
+v?ue
+);
+
+140 
+u?t16_t
+ 
+g?_?q_mask
+();
+
+145 
+???lize_univ??
+();
+
+146 
+?t_?q_mask
+(
+u?t16_t
+ 
+v?ue
+);
+
+147 
+u?t16_t
+ 
+g?_?q_mask
+();
+
+148 
+unmask_?q
+(
+u?t16_t
+ 
+?q_idx
+);
+
+149 
+mask_?q
+(
+u?t16_t
+ 
+?q_idx
+);
+
+150 
+??_?q_d?a_?gi??
+();
+
+151 
+u?t16_t
+ 
+?ad_?d_??r_PMC_?q
+(u?t16_?
+?q
+);
+
+152 
+bo?
+ 
+Is_PMC_IRQ
+?
+u?t32_t
+ 
+pmc_?q
+, 
+u?t16_t
+ 
+??us_w?d
+);
+
+153 
+u?t16_t
+ 
+?ad_?d_??r_?q
+();
+
+154 
+?t_vme_ba?_add?ss
+(
+u?t32_t
+ 
+ba?_add?ss
+);
+
+155 
+u?t32_t
+ 
+g?_vme_?ave_size
+();
+
+156 
+?t_vme_?ave_size
+ (
+u?t32_t
+ 
+size
+);
+
+161 
+???lize_PCI_bridge
+();
+
+162 
+??_?q_d?a_?gi??
+();
+
+163 
+u?t32_t
+ 
+R?d_pci_devi?_?gi??
+(u?t32_?
+add?ss
+);
+
+164 
+Wr?e_pci_devi?_?gi??
+(
+u?t32_t
+ 
+add?ss
+, u?t32_?
+d?a
+);
+
+167 
+SCORE603e_FLASH_Di?b?
+(
+u?t32_t
+ 
+unu?d
+);
+
+168 
+SCORE603e_FLASH_v?ify_?ab?
+();
+
+169 
+SCORE603e_FLASH_E?b?_wr?es
+(
+u?t32_t
+ 
+??
+);
+
+174 
+u?t32_t
+ 
+PCI_bus_?ad
+(v????u?t32_?*
+_addr
+);
+
+175 
+PCI_bus_wr?e
+(v????
+u?t32_t
+ *
+_addr
+, u?t32_?
+_d?a
+);
+
+177 
+       #BSP_FLASH_ENABLE_WRITES
+?
+_??
+?
+       `SCORE603e_FLASH_E?b?_wr?es
+?_?? )
+
+       )
+
+178 
+       #BSP_FLASH_DISABLE_WRITES
+(
+_??
+?
+       `SCORE603e_FLASH_Di?b?
+?_?? )
+
+       )
+
+180 
+       #C?v?t_End?n_32
+?
+_d?a
+ ) \
+
+181 ?((
+_d?a
+&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) | \
+
+182 ((
+_d?a
+&0x00ff0000)>>8?| ((_d?a&0xff000000)>>24?)
+
+       )
+
+184 
+       #C?v?t_End?n_16
+?
+_d?a
+ ) \
+
+185 ?((
+_d?a
+&0x00ff)<<8?| ((_d?a&0xff00)>>8?)
+
+       )
+
+190 
+BSP_disc???_?ock_h?d?r
+();
+
+191 
+BSP_c???_?ock_h?d?r
+();
+
+195 #ifde?
+__?lu?lus
+
+
+       @include/gen2.h
+
+13 #i?de?
+__SCORE_GENERATION_2_h
+
+
+14 
+       #__SCORE_GENERATION_2_h
+
+
+       )
+
+16 #ifde?
+__?lu?lus
+
+
+20 
+       ~<?ems.h
+>
+
+25 
+       #SCORE603E_VME_JUMPER_ADDR
+ 0x00e20000
+
+       )
+
+26 
+       #BSP_FLASH_BASE
+ 0x04000000
+
+       )
+
+27 
+       #SCORE603E_ISA_PCI_IO_BASE
+ 0x80000000
+
+       )
+
+28 
+       #SCORE603E_TIMER_PORT_C
+ 0xfd000000
+
+       )
+
+29 
+       #SCORE603E_TIMER_INT_ACK
+ 0xfd000000
+
+       )
+
+30 
+       #SCORE603E_TIMER_PORT_B
+ 0xfd000008
+
+       )
+
+31 
+       #SCORE603E_TIMER_PORT_A
+ 0xfd000004
+
+       )
+
+33 
+       #SCORE603E_BOARD_CTRL_REG
+ ((v????
+u?t8_t
+*)0xfd00002c)
+
+       )
+
+34 
+       #SCORE603E_BRD_FLASH_DISABLE_MASK
+ 0x40
+
+       )
+
+36 
+       #SCORE603E_85C30_CTRL_0
+ ((v????
+u?t8_t
+*)0x?200020)
+
+       )
+
+37 
+       #SCORE603E_85C30_DATA_0
+ ((v????
+u?t8_t
+*)0x?200024)
+
+       )
+
+38 
+       #SCORE603E_85C30_CTRL_1
+ ((v????
+u?t8_t
+*)0x?200028)
+
+       )
+
+39 
+       #SCORE603E_85C30_DATA_1
+ ((v????
+u?t8_t
+*)0x?20002c)
+
+       )
+
+40 
+       #SCORE603E_85C30_CTRL_2
+ ((v????
+u?t8_t
+*)0x?200000)
+
+       )
+
+41 
+       #SCORE603E_85C30_DATA_2
+ ((v????
+u?t8_t
+*)0x?200004)
+
+       )
+
+42 
+       #SCORE603E_85C30_CTRL_3
+ ((v????
+u?t8_t
+*)0x?200008)
+
+       )
+
+43 
+       #SCORE603E_85C30_DATA_3
+ ((v????
+u?t8_t
+*)0x?20000c)
+
+       )
+
+49 
+       #PCI_DRAM_OFFSET
+ 
+PREP_PCI_DRAM_OFFSET
+
+
+       )
+
+50 
+       #BSP_PCI_CONFIGURATION_BASE
+ 0x80800000
+
+       )
+
+51 
+       #BSP_PMC_BASE
+ 
+BSP_PCI_CONFIGURATION_BASE
+
+
+       )
+
+52 
+       #PCI_MEM_BASE_ADJUSTMENT
+ 0
+
+       )
+
+53 
+       #BSP_PCI_PMC_DEVICE_BASE
+ 0x80808000
+
+       )
+
+54 
+       #BSP_PCI_REGISTER_BASE
+ 0xfc000000
+
+       )
+
+56 
+       #BSP_PCI_DEVICE_ADDRESS
+?
+_off?t
+) \
+
+57 ((v????
+u?t32_t
+ *)?
+BSP_PCI_PMC_DEVICE_BASE
+ + 
+_off?t
+ ))
+
+       )
+
+60 
+       #BSP_PMC_SERIAL_ADDRESS
+?
+_off?t
+ ) \
+
+61 ((v????
+u?t8_t
+*)(
+BSP_PCI_REGISTER_BASE
+ + 
+_off?t
+))
+
+       )
+
+66 
+       #SCORE603E_85C30_CTRL_4
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x00200020)
+
+       )
+
+67 
+       #SCORE603E_85C30_DATA_4
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x00200024)
+
+       )
+
+68 
+       #SCORE603E_85C30_CTRL_5
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x00200028)
+
+       )
+
+69 
+       #SCORE603E_85C30_DATA_5
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x0020002c)
+
+       )
+
+70 
+       #SCORE603E_85C30_CTRL_6
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x00200030)
+
+       )
+
+71 
+       #SCORE603E_85C30_DATA_6
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x00200034)
+
+       )
+
+72 
+       #SCORE603E_85C30_CTRL_7
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x00200038)
+
+       )
+
+73 
+       #SCORE603E_85C30_DATA_7
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x0020003c)
+
+       )
+
+74 
+       #SCORE603E_85C30_CTRL_8
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x00200000)
+
+       )
+
+75 
+       #SCORE603E_85C30_DATA_8
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x00200004)
+
+       )
+
+76 
+       #SCORE603E_85C30_CTRL_9
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x00200008)
+
+       )
+
+77 
+       #SCORE603E_85C30_DATA_9
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x0020000c)
+
+       )
+
+78 
+       #SCORE603E_85C30_CTRL_10
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x00200010)
+
+       )
+
+79 
+       #SCORE603E_85C30_DATA_10
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x00200014)
+
+       )
+
+80 
+       #SCORE603E_85C30_CTRL_11
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x00200018)
+
+       )
+
+81 
+       #SCORE603E_85C30_DATA_11
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x0020001c)
+
+       )
+
+83 
+       #_IO_BASE
+ 
+PREP_ISA_IO_BASE
+
+
+       )
+
+84 
+       #SCORE603E_PCI_IO_CFG_ADDR
+ 0x80000cf8
+
+       )
+
+85 
+       #SCORE603E_PCI_IO_CFG_DATA
+ 0x80000cfc
+
+       )
+
+87 
+       #SCORE603E_UNIVERSE_BASE
+ 0x80030000
+
+       )
+
+88 
+       #SCORE603E_IO_VME_UNIVERSE_BASE
+ 0x80007000
+
+       )
+
+89 
+       #PCI_MEM_BASE
+ 0xc0000000
+
+       )
+
+90 
+       #BSP_PCI_MEM_BASE
+ 
+PCI_MEM_BASE
+
+
+       )
+
+91 
+       #BSP_NVRAM_BASE
+ 0xfd100000
+
+       )
+
+92 
+       #BSP_RTC_ADDRESS
+ ((v????*)0xfd180000)
+
+       )
+
+93 
+       #SCORE603E_JP1_JP2_PROM_BASE
+ 0xfff00000
+
+       )
+
+94 
+       #SCORE603E_NOT_JP1_2_FLASH_BASE
+ 0xff800000
+
+       )
+
+96 #i?(
+SCORE603E_USE_SDS
+?| (
+SCORE603E_USE_OPEN_FIRMWARE
+?| (
+SCORE603E_USE_NONE
+)
+
+97 
+       #SCORE603E_VME_A16_OFFSET
+ 0x04000000
+
+       )
+
+98 #?i?(
+SCORE603E_USE_DINK
+)
+
+99 
+       #SCORE603E_VME_A16_OFFSET
+ 0x11000000
+
+       )
+
+100 
+       #SCORE603E_VME_A24_OFFSET
+ 0x10000000
+
+       )
+
+101 
+       #BSP_VME_A24_BASE
+ (
+BSP_PCI_MEM_BASE
++
+SCORE603E_VME_A24_OFFSET
+)
+
+       )
+
+106 
+       #BSP_VME_A16_BASE
+ (
+BSP_PCI_MEM_BASE
++
+SCORE603E_VME_A16_OFFSET
+)
+
+       )
+
+114 
+       #ICM1770_CRYSTAL_FREQ_32K
+ 0x00
+
+       )
+
+115 
+       #ICM1770_CRYSTAL_FREQ_1M
+ 0x01
+
+       )
+
+116 
+       #ICM1770_CRYSTAL_FREQ_2M
+ 0x02
+
+       )
+
+117 
+       #ICM1770_CRYSTAL_FREQ_4M
+ 0x03
+
+       )
+
+119 
+       #BSP_RTC_FREQUENCY
+ 
+ICM1770_CRYSTAL_FREQ_32K
+
+
+       )
+
+124 
+       #SCORE603E_85C30_0_CLOCK
+ 14745600
+
+       )
+
+125 
+       #SCORE603E_85C30_0_CLOCK_X
+ 16
+
+       )
+
+130 
+       #SCORE603E_85C30_1_CLOCK
+ 16000000
+
+       )
+
+131 
+       #SCORE603E_85C30_1_CLOCK_X
+ 16
+
+       )
+
+136 
+       #SCORE603E_85C30_PMC_CLOCK
+ 16000000
+
+       )
+
+137 
+       #SCORE603E_85C30_PMC_CLOCK_X
+ 16
+
+       )
+
+139 
+       #SCORE603E_85C30_2_CLOCK
+ 
+SCORE603E_85C30_PMC_CLOCK
+
+
+       )
+
+140 
+       #SCORE603E_85C30_3_CLOCK
+ 
+SCORE603E_85C30_PMC_CLOCK
+
+
+       )
+
+141 
+       #SCORE603E_85C30_4_CLOCK
+ 
+SCORE603E_85C30_PMC_CLOCK
+
+
+       )
+
+142 
+       #SCORE603E_85C30_5_CLOCK
+ 
+SCORE603E_85C30_PMC_CLOCK
+
+
+       )
+
+143 
+       #SCORE603E_85C30_2_CLOCK_X
+ 
+SCORE603E_85C30_PMC_CLOCK_X
+
+
+       )
+
+144 
+       #SCORE603E_85C30_3_CLOCK_X
+ 
+SCORE603E_85C30_PMC_CLOCK_X
+
+
+       )
+
+145 
+       #SCORE603E_85C30_4_CLOCK_X
+ 
+SCORE603E_85C30_PMC_CLOCK_X
+
+
+       )
+
+146 
+       #SCORE603E_85C30_5_CLOCK_X
+ 
+SCORE603E_85C30_PMC_CLOCK_X
+
+
+       )
+
+148 
+       #SCORE603E_UNIVERSE_CHIP_ID
+ 0x000010E3
+
+       )
+
+153 
+       #SCORE603E_FPGA_VECT_DATA
+ ((v????
+u?t16_t
+*)0xfd000040)
+
+       )
+
+154 
+       #SCORE603E_FPGA_BIT1_15_0
+ ((v????
+u?t16_t
+*)0xfd000044)
+
+       )
+
+155 
+       #SCORE603E_FPGA_MASK_DATA
+ ((v????
+u?t16_t
+*)0xfd000048)
+
+       )
+
+156 
+       #SCORE603E_FPGA_IRQ_INPUT
+ ((v????
+u?t16_t
+*)0xfd00004c)
+
+       )
+
+161 
+       #BSP_PMC_STATUS_ADDRESS
+ (
+       `BSP_PMC_SERIAL_ADDRESS
+ (0))
+
+       )
+
+162 
+       #Is_PMC_85C30_4_IRQ
+?
+_??us
+ ) (_??u?& 0x80?
+
+       )
+
+163 
+       #Is_PMC_85C30_2_IRQ
+?
+_??us
+ ) (_??u?& 0x40?
+
+       )
+
+164 
+       #Is_PMC_85C30_5_IRQ
+?
+_??us
+ ) (_??u?& 0x20?
+
+       )
+
+165 
+       #Is_PMC_85C30_3_IRQ
+?
+_??us
+ ) (_??u?& 0x08?
+
+       )
+
+167 
+       #SCORE603E_PMC_CONTROL_ADDRESS
+ 
+       `BSP_PMC_SERIAL_ADDRESS
+(0x100000)
+
+       )
+
+168 
+       #SCORE603E_PMC_SCC_232_LOOPBACK
+ (
+_w?d
+?(_w?d|0x20)
+
+       )
+
+170 
+       #PMC_SET_232_LOOPBACK
+(
+_w?d
+?(_w?d | 0x02)
+
+       )
+
+171 
+       #PMC_CLEAR_232_LOOPBACK
+(
+_w?d
+?(_w?d & 0xfd)
+
+       )
+
+172 
+       #PMC_SET_422_LOOPBACK
+(
+_w?d
+?(_w?d | 0x01)
+
+       )
+
+173 
+       #PMC_CLEAR_422_LOOPBACK
+(
+_w?d
+?(_w?d & 0x?)
+
+       )
+
+185 
+       #BSP_TIMER_AVG_OVERHEAD
+ 4
+
+       )
+
+187 
+       #BSP_TIMER_LEAST_VALID
+ 1
+
+       )
+
+201 
+       #BSP_C?v?t_de?em??r
+?
+_v?ue
+ ) \
+
+202 (?(((
+_v?ue
+?* 4000?/ 6667)
+
+       )
+
+204 #ifde?
+__?lu?lus
+
+
+       @include/tm27.h
+
+16 #i?de?
+_RTEMS_TMTEST27
+
+
+20 #i?de?
+__tm27_h
+
+
+21 
+       #__tm27_h
+
+
+       )
+
+23 
+       ~<b?/?q.h
+>
+
+29 
+       #MUST_WAIT_FOR_INTERRUPT
+ 1
+
+       )
+
+31 
+       $nu?Func
+(?{
+       }
+}
+
+33 
+?ems_?q_c???_d?a
+ 
+       g?ockIrqD?a
+ = {
+BSP_DECREMENTER
+,
+
+35 (
+?ems_?q_?ab?
+)
+nu?Func
+,
+
+36 (
+?ems_?q_di?b?
+)
+nu?Func
+,
+
+37 (
+?ems_?q_is_?ab?d
+?
+nu?Func
+};
+
+38 
+In??l_tm27_ve??
+((*
+_h?d?r
+)())
+
+40 
+?ockIrqD?a
+.
+hdl
+ = 
+_h?d?r
+;
+
+41 i?(!
+       `BSP_???l_?ems_?q_h?d?r
+ (&
+?ockIrqD?a
+)) {
+
+42 
+       `??tk
+("Error installing clock interrupt handler!\n");
+
+43 
+       `?ems_??l_?r?_occu?ed
+(1);
+
+45 
+       }
+}
+
+47 
+       #Cau?_tm27_??
+() \
+
+49 
+u?t32_t
+ 
+_?icks
+ = 8; \
+
+50 
+__asm__
+ v???e?"mtde?%0" : "?" ((
+_?icks
+)) : "r" ((_clicks)) ); \
+
+51 } 0)
+
+       )
+
+53 
+       #C??_tm27_??
+() \
+
+55 
+u?t32_t
+ 
+_?icks
+ = 0xffffffff; \
+
+56 
+__asm__
+ v???e?"mtde?%0" : "?" ((
+_?icks
+)) : "r" ((_clicks)) ); \
+
+57 } 0)
+
+       )
+
+59 
+       #Low?_tm27_??
+() \
+
+61 
+u?t32_t
+ 
+_m?
+ = 0; \
+
+62 
+       `_ISR_S?_?v?
+( 0 ); \
+
+63 
+__asm__
+ v???e?"mfm? %0 ;" : "?" (
+_m?
+) : "r" (_msr) ); \
+
+64 
+_m?
+ |= 0x8002; \
+
+65 
+__asm__
+ v???e?"mtm? %0 ;" : "?" (
+_m?
+) : "r" (_msr) ); \
+
+66 } 0)
+
+       )
+
+       @irq/FPGA.c
+
+14 
+       ~<b?.h
+>
+
+15 
+       ~<b?/?q.h
+>
+
+16 
+       ~<?r?g.h
+>
+
+17 
+       ~<f??.h
+>
+
+18 
+       ~<as??.h
+>
+
+20 
+       ~<?ems/libio.h
+>
+
+21 
+       ~<?ems/libcsu??t.h
+>
+
+22 
+       ~<?ems/b?Io.h
+>
+
+27 
+       $???lize_PCI_bridge
+ ()
+
+32 
+       }
+}
+
+34 
+       $?t_?q_mask
+(
+
+35 
+u?t16_t
+ 
+v?ue
+
+
+38 v????
+u?t16_t
+ *
+loc
+;
+
+40 
+loc
+ = (
+u?t16_t
+*)
+SCORE603E_FPGA_MASK_DATA
+;
+
+42 *
+loc
+ = 
+v?ue
+;
+
+43 
+       }
+}
+
+45 
+u?t16_t
+ 
+       $g?_?q_mask
+( )
+
+47 v????
+u?t16_t
+ *
+loc
+;
+
+48 
+u?t16_t
+ 
+v?ue
+;
+
+50 
+loc
+ = (
+u?t16_t
+*)
+SCORE603E_FPGA_MASK_DATA
+;
+
+52 
+v?ue
+ = *
+loc
+;
+
+54  
+v?ue
+;
+
+55 
+       }
+}
+
+57 
+       $mask_?q
+(
+
+58 
+u?t16_t
+ 
+?q_idx
+
+
+61 
+u?t16_t
+ 
+v?ue
+;
+
+62 
+u?t32_t
+ 
+mask_idx
+ = 
+?q_idx
+;
+
+64 
+v?ue
+ = 
+       `g?_?q_mask
+();
+
+66 #i?(
+HAS_PMC_PSC8
+)
+
+67 
+?q_idx
+ + 
+Sc?e_IRQ_F??
+ ) {
+
+68 
+SCORE603E_85C30_4_IRQ
+:
+
+69 
+SCORE603E_85C30_2_IRQ
+:
+
+70 
+SCORE603E_85C30_5_IRQ
+:
+
+71 
+SCORE603E_85C30_3_IRQ
+:
+
+72 
+mask_idx
+ = 
+SCORE603E_PCI_IRQ_0
+ - 
+Sc?e_IRQ_F??
+;
+
+79 
+v?ue
+ |?(0x1 << 
+mask_idx
+);
+
+80 
+       `?t_?q_mask
+?
+v?ue
+ );
+
+81 
+       }
+}
+
+83 
+       $unmask_?q
+(
+
+84 
+u?t16_t
+ 
+?q_idx
+
+
+87 
+u?t16_t
+ 
+v?ue
+;
+
+88 
+u?t32_t
+ 
+mask_idx
+ = 
+?q_idx
+;
+
+90 
+v?ue
+ = 
+       `g?_?q_mask
+();
+
+92 #i?(
+HAS_PMC_PSC8
+)
+
+93 
+?q_idx
+ + 
+Sc?e_IRQ_F??
+ ) {
+
+94 
+SCORE603E_85C30_4_IRQ
+:
+
+95 
+SCORE603E_85C30_2_IRQ
+:
+
+96 
+SCORE603E_85C30_5_IRQ
+:
+
+97 
+SCORE603E_85C30_3_IRQ
+:
+
+98 
+mask_idx
+ = 
+SCORE603E_PCI_IRQ_0
+ - 
+Sc?e_IRQ_F??
+;
+
+105 
+v?ue
+ &?(~(0x1 << 
+mask_idx
+));
+
+106 
+       `?t_?q_mask
+?
+v?ue
+ );
+
+107 
+       }
+}
+
+109 
+       $??_?q_d?a_?gi??
+()
+
+111 
+u?t32_t
+ 
+?dex
+;
+
+112 
+u?t32_t
+ 
+i
+;
+
+114 
+       `?t_?q_mask
+( 0xffff );
+
+119 
+i
+=0; i<20; i++) {
+
+120 
+?dex
+ = (*
+SCORE603E_FPGA_VECT_DATA
+);
+
+121 i??(
+?dex
+&0x10) != 0x10 )
+
+124 
+       }
+}
+
+126 
+u?t16_t
+ 
+       $?ad_?d_??r_PMC_?q
+(
+
+127 
+u?t16_t
+ 
+?q
+
+
+130 
+u?t16_t
+ 
+??us_w?d
+ = 
+?q
+;
+
+132 
+??us_w?d
+ = (*
+BSP_PMC_STATUS_ADDRESS
+);
+
+134  
+??us_w?d
+;
+
+135 
+       }
+}
+
+137 
+bo?
+ 
+       $Is_PMC_IRQ
+(
+
+138 
+u?t32_t
+ 
+pmc_?q
+,
+
+139 
+u?t16_t
+ 
+??us_w?d
+
+
+142 
+bo?
+ 
+?su?
+ = 
+?l?
+;
+
+144 
+pmc_?q
+) {
+
+145 
+SCORE603E_85C30_4_IRQ
+:
+
+146 
+?su?
+ = 
+       `Is_PMC_85C30_4_IRQ
+?
+??us_w?d
+ ) ? 
+?ue
+ : 
+?l?
+;
+
+148 
+SCORE603E_85C30_2_IRQ
+:
+
+149 
+?su?
+ = 
+       `Is_PMC_85C30_2_IRQ
+?
+??us_w?d
+ ) ? 
+?ue
+ : 
+?l?
+;
+
+151 
+SCORE603E_85C30_5_IRQ
+:
+
+152 
+?su?
+ = 
+       `Is_PMC_85C30_5_IRQ
+?
+??us_w?d
+ ) ? 
+?ue
+ : 
+?l?
+;
+
+154 
+SCORE603E_85C30_3_IRQ
+:
+
+155 
+?su?
+ = 
+       `Is_PMC_85C30_3_IRQ
+?
+??us_w?d
+ ) ? 
+?ue
+ : 
+?l?
+;
+
+158 
+       `as??
+( 0 );
+
+162  
+?su?
+;
+
+163 
+       }
+}
+
+165 
+u?t16_t
+ 
+       $?ad_?d_??r_?q
+()
+
+167 
+u?t16_t
+ 
+?q
+;
+
+170 
+?q
+ = (*
+SCORE603E_FPGA_VECT_DATA
+);
+
+171 
+       `Pro?ss?_Synchr?ize
+();
+
+172 i?((
+?q
+ & 0xffff0) != 0x10) {
+
+173 
+       `??tk
+?"?ad_?d_??r_?q:: ERROR==>n??q d??0x%x\n", 
+?q
+);
+
+174  (
+?q
+ | 0x80);
+
+177 
+?q
+ &=0xf;
+
+178 
+?q
+ +?
+Sc?e_IRQ_F??
+;
+
+179  
+?q
+;
+
+180 
+       }
+}
+
+       @irq/irq.c
+
+11 
+       ~<?dlib.h
+>
+
+13 
+       ~<b?.h
+>
+
+14 
+       ~<b?/?q.h
+>
+
+15 
+       ~<b?/VME.h
+>
+
+16 
+       ~<?ems/sc?e/??xt.h
+>
+
+17 
+       ~<lib?u/io.h
+>
+
+18 
+       ~<b?/ve??s.h
+>
+
+19 
+       ~<?dlib.h
+>
+
+20 
+       ~<?ems/b?Io.h
+>
+
+25 
+?ems_?q_c???_d?a
+ 
+       gde?u?_?ems_??y
+;
+
+31 
+?ems_?q_glob?_???gs
+* 
+       g????_c?fig
+;
+
+32 
+?ems_?q_c???_d?a
+* 
+       g?ems_hdl_tbl
+;
+
+37 
+?l?e
+ 
+       $is_i?_?q
+(c?? 
+?ems_?q_numb?
+ 
+?qL?e
+)
+
+39  (((?
+?qL?e
+ <?
+BSP_ISA_IRQ_MAX_OFFSET
+) &
+
+40 ((?
+?qL?e
+ >?
+BSP_ISA_IRQ_LOWEST_OFFSET
+)
+
+42 
+       }
+}
+
+47 
+?l?e
+ 
+       $is_pci_?q
+(c?? 
+?ems_?q_numb?
+ 
+?qL?e
+)
+
+49  (((?
+?qL?e
+ <?
+BSP_PCI_IRQ_MAX_OFFSET
+) &
+
+50 ((?
+?qL?e
+ >?
+BSP_PCI_IRQ_LOWEST_OFFSET
+)
+
+52 
+       }
+}
+
+57 
+?l?e
+ 
+       $is_?o?ss?_?q
+(c?? 
+?ems_?q_numb?
+ 
+?qL?e
+)
+
+59  (((?
+?qL?e
+ <?
+BSP_PROCESSOR_IRQ_MAX_OFFSET
+) &
+
+60 ((?
+?qL?e
+ >?
+BSP_PROCESSOR_IRQ_LOWEST_OFFSET
+)
+
+62 
+       }
+}
+
+73 
+       $isV?idI??ru?
+(
+?q
+)
+
+75 i??(
+?q
+ < 
+BSP_LOWEST_OFFSET
+?|| (?q > 
+BSP_MAX_OFFSET
+))
+
+78 
+       }
+}
+
+83 
+       $BSP_???l_?ems_sh?ed_?q_h?d?r
+ (c?? 
+?ems_?q_c???_d?a
+* 
+?q
+)
+
+85 
+?ems_???u?_?v?
+ 
+?v?
+;
+
+86 
+?ems_?q_c???_d?a
+* 
+vcha?
+;
+
+88 
+       `??tk
+(" BSP_???l_?ems_sh?ed_?q_h?d??%d\n", 
+?q
+->
+?me
+ );
+
+90 i?(!
+       `isV?idI??ru?
+(
+?q
+->
+?me
+)) {
+
+91 
+       `??tk
+("Inv?id i??ru? ve?? %d\n",
+?q
+->
+?me
+);
+
+95 
+       `?ems_???u?_di?b?
+(
+?v?
+);
+
+97 i??()
+?ems_hdl_tbl
+[
+?q
+->
+?me
+].
+?xt_h?d?r
+ == -1 ) {
+
+98 
+       `?ems_???u?_?ab?
+(
+?v?
+);
+
+99 
+       `??tk
+("IRQ ve?? %d???dy c???ed??? unsh?ed h?d?r\n",
+?q
+->
+?me
+);
+
+103 
+vcha?
+ = (
+?ems_?q_c???_d?a
+*)
+       `m?loc
+((rtems_irq_connect_data));
+
+106 
+vcha?
+[0]?
+?ems_hdl_tbl
+[
+?q
+->
+?me
+];
+
+111 
+?ems_hdl_tbl
+[
+?q
+->
+?me
+] = *irq;
+
+114 
+?ems_hdl_tbl
+[
+?q
+->
+?me
+].
+?xt_h?d?r
+ = (*)
+vcha?
+;
+
+119 i?(
+       `is_pci_?q
+(
+?q
+->
+?me
+)) {
+
+122 i?(
+       `is_?o?ss?_?q
+(
+?q
+->
+?me
+)) {
+
+130 i?(
+?q
+->
+?
+)
+
+131 
+?q
+->
+       `?
+(irq);
+
+133 
+       `?ems_???u?_?ab?
+(
+?v?
+);
+
+136 
+       }
+}
+
+141 
+?ems_??us_code
+ 
+       $b?_???u?_ve??_di?b?
+?
+?ems_ve??_numb?
+ 
+?qL?e
+)
+
+145 
+       `??tk
+("b?_???u?_ve??_di?b?: 0x%x\n", 
+?qL?e
+ );
+
+146  
+RTEMS_SUCCESSFUL
+;
+
+147 
+       }
+}
+
+149 
+?ems_??us_code
+ 
+       $b?_???u?_ve??_?ab?
+?
+?ems_ve??_numb?
+ 
+?qL?e
+)
+
+152 
+       `??tk
+("b?_???u?_ve??_?ab?: 0x%x\n", 
+?qL?e
+ );
+
+154  
+RTEMS_SUCCESSFUL
+;
+
+155 
+       }
+}
+
+163 
+       $BSP_???l_?ems_?q_h?d?r
+ (c?? 
+?ems_?q_c???_d?a
+* 
+?q
+)
+
+165 
+?ems_???u?_?v?
+ 
+?v?
+;
+
+167 
+       `??tk
+(" BSP_???l_?ems_?q_h?d??%d\n", 
+?q
+->
+?me
+ );
+
+169 i?(!
+       `isV?idI??ru?
+(
+?q
+->
+?me
+)) {
+
+170 
+       `??tk
+("Inv?id i??ru? ve?? %d\n",
+?q
+->
+?me
+);
+
+180 
+       `?ems_???u?_di?b?
+(
+?v?
+);
+
+181 i?(
+?ems_hdl_tbl
+[
+?q
+->
+?me
+].
+hdl
+ !?
+de?u?_?ems_??y
+.hdl) {
+
+182 
+       `?ems_???u?_?ab?
+(
+?v?
+);
+
+183 
+       `??tk
+("IRQ ve?? %d???dy c???ed\n",
+?q
+->
+?me
+);
+
+190 
+?ems_hdl_tbl
+[
+?q
+->
+?me
+] = *irq;
+
+191 
+?ems_hdl_tbl
+[
+?q
+->
+?me
+].
+?xt_h?d?r
+ = (*)-1;
+
+194 i?(
+       `is_pci_?q
+(
+?q
+->
+?me
+)) {
+
+198 
+       `??tk
+("is_pci_irq = TRUE - FIX THIS!\n");
+
+201 i?(
+       `is_?o?ss?_?q
+(
+?q
+->
+?me
+)) {
+
+205 
+       `??tk
+("is_processor_irq = TRUE : Fix This\n");
+
+211 i?(
+?q
+->
+?
+) {
+
+212 
+       `??tk
+("C??0x%x\n", 
+?q
+->
+?
+ );
+
+213 
+?q
+->
+       `?
+(irq);
+
+216 
+       `?ems_???u?_?ab?
+(
+?v?
+);
+
+219 
+       }
+}
+
+221 
+       $BSP_g?_cu??t_?ems_?q_h?d?r
+ (
+?ems_?q_c???_d?a
+* 
+?q
+)
+
+223 
+?ems_???u?_?v?
+ 
+?v?
+;
+
+225 
+       `??tk
+(" BSP_g?_cu??t_?ems_?q_h?d??%d\n", 
+?q
+->
+?me
+ );
+
+226 i?(!
+       `isV?idI??ru?
+(
+?q
+->
+?me
+)) {
+
+229 
+       `?ems_???u?_di?b?
+(
+?v?
+);
+
+230 *
+?q
+ = 
+?ems_hdl_tbl
+[?q->
+?me
+];
+
+231 
+       `?ems_???u?_?ab?
+(
+?v?
+);
+
+233 
+       }
+}
+
+235 
+       $BSP_?move_?ems_?q_h?d?r
+ (c?? 
+?ems_?q_c???_d?a
+* 
+?q
+)
+
+237 
+?ems_?q_c???_d?a
+ *
+pcha?
+?
+NULL
+, *
+vcha?
+ = NULL;
+
+238 
+?ems_???u?_?v?
+ 
+?v?
+;
+
+240 
+       `??tk
+(" BSP_?move_?ems_?q_h?d??%d\n", 
+?q
+->
+?me
+ );
+
+241 i?(!
+       `isV?idI??ru?
+(
+?q
+->
+?me
+)) {
+
+251 
+       `?ems_???u?_di?b?
+(
+?v?
+);
+
+252 i?(
+?ems_hdl_tbl
+[
+?q
+->
+?me
+].
+hdl
+ != irq->hdl) {
+
+253 
+       `?ems_???u?_?ab?
+(
+?v?
+);
+
+257 if?()
+?ems_hdl_tbl
+[
+?q
+->
+?me
+].
+?xt_h?d?r
+ != -1 )
+
+259 
+found
+ = 0;
+
+261  (
+pcha?
+?
+NULL
+, 
+vcha?
+ = &
+?ems_hdl_tbl
+[
+?q
+->
+?me
+]);
+
+262 (
+vcha?
+->
+hdl
+ !?
+de?u?_?ems_??y
+.hdl);
+
+263 (
+pcha?
+?
+vcha?
+, vcha? = (
+?ems_?q_c???_d?a
+*)vcha?->
+?xt_h?d?r
+) )
+
+265 if?
+vcha?
+->
+hdl
+ =?
+?q
+->hdl )
+
+267 
+found
+= -1; ;
+
+271 if?!
+found
+ )
+
+273 
+       `?ems_???u?_?ab?
+(
+?v?
+);
+
+279 i?(
+?ems_hdl_tbl
+[
+?q
+->
+?me
+].
+hdl
+ != irq->hdl)
+
+281 
+       `?ems_???u?_?ab?
+(
+?v?
+);
+
+287 i?(
+       `is_pci_?q
+(
+?q
+->
+?me
+)) {
+
+292 i?(
+       `is_?o?ss?_?q
+(
+?q
+->
+?me
+)) {
+
+301 i?(
+?q
+->
+off
+)
+
+302 
+?q
+->
+       `off
+(irq);
+
+307 if?!
+vcha?
+ )
+
+310 
+?ems_hdl_tbl
+[
+?q
+->
+?me
+] = 
+de?u?_?ems_??y
+;
+
+314 if?
+pcha?
+ )
+
+317 
+pcha?
+->
+?xt_h?d?r
+ = 
+vcha?
+->next_handler;
+
+324 
+?ems_hdl_tbl
+[
+?q
+->
+?me
+]?*
+vcha?
+;
+
+326 
+       `??
+(
+vcha?
+);
+
+329 
+       `?ems_???u?_?ab?
+(
+?v?
+);
+
+332 
+       }
+}
+
+338 
+       $BSP_?ems_?q_mngt_?t
+(
+?ems_?q_glob?_???gs
+* 
+c?fig
+)
+
+340 
+i
+;
+
+341 
+?ems_???u?_?v?
+ 
+?v?
+;
+
+346 
+????_c?fig
+ = 
+c?fig
+;
+
+347 
+de?u?_?ems_??y
+ = 
+c?fig
+->
+de?u?E?ry
+;
+
+348 
+?ems_hdl_tbl
+ = 
+c?fig
+->
+?qHdlTbl
+;
+
+350 
+       `??tk
+(" BSP_rtems_irq_mngt_set\n");
+
+352 
+       `?ems_???u?_di?b?
+(
+?v?
+);
+
+360 
+i
+=
+BSP_PCI_IRQ_LOWEST_OFFSET
+; i < BSP_PCI_IRQ_LOWEST_OFFSET + 
+BSP_PCI_IRQ_NUMBER
+ ; i++) {
+
+361 i?(
+?ems_hdl_tbl
+[
+i
+].
+hdl
+ !?
+de?u?_?ems_??y
+.hdl) {
+
+363 
+?ems_?q_c???_d?a
+* 
+vcha?
+;
+
+364  
+vcha?
+ = &
+?ems_hdl_tbl
+[
+i
+];
+
+365 (()
+vcha?
+ !?-1 && vcha?->
+hdl
+ !?
+de?u?_?ems_??y
+.hdl);
+
+366 
+vcha?
+ = (
+?ems_?q_c???_d?a
+*)vcha?->
+?xt_h?d?r
+ )
+
+368 i?(
+vcha?
+->
+?
+)
+
+369 
+vcha?
+->
+       `?
+(vchain);
+
+377 
+?ems_?q_c???_d?a
+* 
+vcha?
+;
+
+378  
+vcha?
+ = &
+?ems_hdl_tbl
+[
+i
+];
+
+379 (()
+vcha?
+ !?-1 && vcha?->
+hdl
+ !?
+de?u?_?ems_??y
+.hdl);
+
+380 
+vcha?
+ = (
+?ems_?q_c???_d?a
+*)vcha?->
+?xt_h?d?r
+ )
+
+382 i?(
+vcha?
+->
+off
+)
+
+383 
+vcha?
+->
+       `off
+(vchain);
+
+391 
+i
+=
+BSP_PROCESSOR_IRQ_LOWEST_OFFSET
+; i < BSP_PROCESSOR_IRQ_LOWEST_OFFSET+
+BSP_PROCESSOR_IRQ_NUMBER
+; i++){
+
+392 i?(
+?ems_hdl_tbl
+[
+i
+].
+hdl
+ !?
+de?u?_?ems_??y
+.hdl) {
+
+394 
+?ems_?q_c???_d?a
+* 
+vcha?
+;
+
+395  
+vcha?
+ = &
+?ems_hdl_tbl
+[
+i
+];
+
+396 (()
+vcha?
+ !?-1 && vcha?->
+hdl
+ !?
+de?u?_?ems_??y
+.hdl);
+
+397 
+vcha?
+ = (
+?ems_?q_c???_d?a
+*)vcha?->
+?xt_h?d?r
+ )
+
+399 i?(
+vcha?
+->
+?
+)
+
+400 
+vcha?
+->
+       `?
+(vchain);
+
+407 
+?ems_?q_c???_d?a
+* 
+vcha?
+;
+
+408  
+vcha?
+ = &
+?ems_hdl_tbl
+[
+i
+];
+
+409 (()
+vcha?
+ !?-1 && vcha?->
+hdl
+ !?
+de?u?_?ems_??y
+.hdl);
+
+410 
+vcha?
+ = (
+?ems_?q_c???_d?a
+*)vcha?->
+?xt_h?d?r
+ )
+
+412 i?(
+vcha?
+->
+off
+)
+
+413 
+vcha?
+->
+       `off
+(vchain);
+
+419 
+       `?ems_???u?_?ab?
+(
+?v?
+);
+
+421 
+       }
+}
+
+423 
+       $BSP_?ems_?q_mngt_g?
+(
+?ems_?q_glob?_???gs
+** 
+c?fig
+)
+
+425 *
+c?fig
+ = 
+????_c?fig
+;
+
+427 
+       }
+}
+
+429 
+       gBSP_?uriousI?r
+ = 0;
+
+434 
+       $C_di??ch_?q_h?d?r
+ (
+CPU_I??ru?_?ame
+ *
+?ame
+, 
+excNum
+)
+
+436 
+?q
+;
+
+437 
+m?
+;
+
+438 
+?w_m?
+;
+
+440 i?(
+excNum
+ =?
+ASM_DEC_VECTOR
+) {
+
+441 
+       `_CPU_MSR_GET
+(
+m?
+);
+
+442 
+?w_m?
+ = 
+m?
+ | 
+MSR_EE
+;
+
+443 
+       `_CPU_MSR_SET
+(
+?w_m?
+);
+
+445 
+?ems_hdl_tbl
+[
+BSP_DECREMENTER
+].
+       `hdl
+??ms_hdl_tbl[BSP_DECREMENTER].
+h?d?
+);
+
+447 
+       `_CPU_MSR_SET
+(
+m?
+);
+
+452 
+?q
+ = 
+       `?ad_?d_??r_?q
+();
+
+453 
+       `_CPU_MSR_GET
+(
+m?
+);
+
+454 
+?w_m?
+ = 
+m?
+ | 
+MSR_EE
+;
+
+455 
+       `_CPU_MSR_SET
+(
+?w_m?
+);
+
+459 
+?ems_?q_c???_d?a
+* 
+vcha?
+;
+
+460  
+vcha?
+ = &
+?ems_hdl_tbl
+[
+?q
+];
+
+461 (()
+vcha?
+ !?-1 && vcha?->
+hdl
+ !?
+de?u?_?ems_??y
+.hdl);
+
+462 
+vcha?
+ = (
+?ems_?q_c???_d?a
+*)vcha?->
+?xt_h?d?r
+ )
+
+464 
+vcha?
+->
+       `hdl
+(vcha?->
+h?d?
+);
+
+468 
+       `_CPU_MSR_SET
+(
+m?
+);
+
+471 
+       }
+}
+
+473 
+?ems_??us_code
+ 
+       $b?_???u?_?c??y_???lize
+()
+
+476 i?(
+       `?c_exc_?t_h?d?r
+?
+ASM_EXT_VECTOR
+, 
+C_di??ch_?q_h?d?r
+)) {
+
+477  
+RTEMS_IO_ERROR
+;
+
+479 i?(
+       `?c_exc_?t_h?d?r
+?
+ASM_DEC_VECTOR
+, 
+C_di??ch_?q_h?d?r
+)) {
+
+480  
+RTEMS_IO_ERROR
+;
+
+482 i?(
+       `?c_exc_?t_h?d?r
+?
+ASM_E300_SYSMGMT_VECTOR
+, 
+C_di??ch_?q_h?d?r
+)) {
+
+483  
+RTEMS_IO_ERROR
+;
+
+486  
+RTEMS_SUCCESSFUL
+;
+
+487 
+       }
+}
+
+489 
+       $b?_???u?_h?d?r_de?u?
+?
+?ems_ve??_numb?
+ 
+ve??
+ )
+
+491 i?(
+ve??
+ !?
+BSP_DECREMENTER
+) {
+
+492 
+       `??tk
+?"Spuriou????u?: 0x%08x\n", 
+ve??
+);
+
+494 
+       }
+}
+
+       @irq/irq.h
+
+20 #i?de?
+BSP_POWERPC_IRQ_H
+
+
+21 
+       #BSP_POWERPC_IRQ_H
+
+
+       )
+
+23 
+       #BSP_SHARED_HANDLER_SUPPORT
+ 1
+
+       )
+
+24 
+       ~<?ems/?q.h
+>
+
+26 #i?de?
+ASM
+
+
+28 #ifde?
+__?lu?lus
+
+
+40 
+       #BSP_ISA_IRQ_NUMBER
+ (16)
+
+       )
+
+41 
+       #BSP_ISA_IRQ_LOWEST_OFFSET
+ (0)
+
+       )
+
+42 
+       #BSP_ISA_IRQ_MAX_OFFSET
+ (
+BSP_ISA_IRQ_LOWEST_OFFSET
+ + 
+BSP_ISA_IRQ_NUMBER
+ - 1)
+
+       )
+
+47 
+       #BSP_PCI_IRQ_NUMBER
+ (16)
+
+       )
+
+48 
+       #BSP_PCI_IRQ_LOWEST_OFFSET
+ (
+BSP_ISA_IRQ_NUMBER
+)
+
+       )
+
+49 
+       #BSP_PCI_IRQ_MAX_OFFSET
+ (
+BSP_PCI_IRQ_LOWEST_OFFSET
+ + 
+BSP_PCI_IRQ_NUMBER
+ - 1)
+
+       )
+
+54 
+       #BSP_PMC_IRQ_NUMBER
+ (4)
+
+       )
+
+55 
+       #BSP_PMC_IRQ_LOWEST_OFFSET
+ (
+BSP_PCI_IRQ_MAX_OFFSET
+ + 1)
+
+       )
+
+56 
+       #BSP_PMC_IRQ_MAX_OFFSET
+ (
+BSP_PMC_IRQ_LOWEST_OFFSET
+ + 
+BSP_PMC_IRQ_NUMBER
+ - 1)
+
+       )
+
+63 
+       #BSP_PROCESSOR_IRQ_NUMBER
+ (1)
+
+       )
+
+64 
+       #BSP_PROCESSOR_IRQ_LOWEST_OFFSET
+ (
+BSP_PMC_IRQ_MAX_OFFSET
+ + 1)
+
+       )
+
+65 
+       #BSP_PROCESSOR_IRQ_MAX_OFFSET
+ (
+BSP_PROCESSOR_IRQ_LOWEST_OFFSET
+ + 
+BSP_PROCESSOR_IRQ_NUMBER
+ - 1)
+
+       )
+
+69 
+       #BSP_MISC_IRQ_NUMBER
+ (8)
+
+       )
+
+70 
+       #BSP_MISC_IRQ_LOWEST_OFFSET
+ (
+BSP_PROCESSOR_IRQ_MAX_OFFSET
+ + 1)
+
+       )
+
+71 
+       #BSP_MISC_IRQ_MAX_OFFSET
+ (
+BSP_MISC_IRQ_LOWEST_OFFSET
+ + 
+BSP_MISC_IRQ_NUMBER
+ - 1)
+
+       )
+
+75 
+       #BSP_IRQ_NUMBER
+ (
+BSP_MISC_IRQ_MAX_OFFSET
+ + 1)
+
+       )
+
+76 
+       #BSP_LOWEST_OFFSET
+ (
+BSP_ISA_IRQ_LOWEST_OFFSET
+)
+
+       )
+
+77 
+       #BSP_MAX_OFFSET
+ (
+BSP_MISC_IRQ_MAX_OFFSET
+)
+
+       )
+
+82 
+       #BSP_DECREMENTER
+ (
+BSP_PROCESSOR_IRQ_LOWEST_OFFSET
+)
+
+       )
+
+87 
+       #Sc?e_IRQ_F??
+ ( 
+BSP_PCI_IRQ_LOWEST_OFFSET
+ )
+
+       )
+
+92 
+       #SCORE603E_IRQ00
+ ( 
+Sc?e_IRQ_F??
+ + 0 )
+
+       )
+
+93 
+       #SCORE603E_IRQ01
+ ( 
+Sc?e_IRQ_F??
+ + 1 )
+
+       )
+
+94 
+       #SCORE603E_IRQ02
+ ( 
+Sc?e_IRQ_F??
+ + 2 )
+
+       )
+
+95 
+       #SCORE603E_IRQ03
+ ( 
+Sc?e_IRQ_F??
+ + 3 )
+
+       )
+
+96 
+       #SCORE603E_IRQ04
+ ( 
+Sc?e_IRQ_F??
+ + 4 )
+
+       )
+
+97 
+       #SCORE603E_IRQ05
+ ( 
+Sc?e_IRQ_F??
+ + 5 )
+
+       )
+
+98 
+       #SCORE603E_IRQ06
+ ( 
+Sc?e_IRQ_F??
+ + 6 )
+
+       )
+
+99 
+       #SCORE603E_IRQ07
+ ( 
+Sc?e_IRQ_F??
+ + 7 )
+
+       )
+
+100 
+       #SCORE603E_IRQ08
+ ( 
+Sc?e_IRQ_F??
+ + 8 )
+
+       )
+
+101 
+       #SCORE603E_IRQ09
+ ( 
+Sc?e_IRQ_F??
+ + 9 )
+
+       )
+
+102 
+       #SCORE603E_IRQ10
+ ( 
+Sc?e_IRQ_F??
+ + 10 )
+
+       )
+
+103 
+       #SCORE603E_IRQ11
+ ( 
+Sc?e_IRQ_F??
+ + 11 )
+
+       )
+
+104 
+       #SCORE603E_IRQ12
+ ( 
+Sc?e_IRQ_F??
+ + 12 )
+
+       )
+
+105 
+       #SCORE603E_IRQ13
+ ( 
+Sc?e_IRQ_F??
+ + 13 )
+
+       )
+
+106 
+       #SCORE603E_IRQ14
+ ( 
+Sc?e_IRQ_F??
+ + 14 )
+
+       )
+
+107 
+       #SCORE603E_IRQ15
+ ( 
+Sc?e_IRQ_F??
+ + 15 )
+
+       )
+
+109 
+       #SCORE603E_TIMER1_IRQ
+ 
+SCORE603E_IRQ00
+
+
+       )
+
+110 
+       #SCORE603E_TIMER2_IRQ
+ 
+SCORE603E_IRQ01
+
+
+       )
+
+111 
+       #SCORE603E_TIMER3_IRQ
+ 
+SCORE603E_IRQ02
+
+
+       )
+
+112 
+       #SCORE603E_85C30_1_IRQ
+ 
+SCORE603E_IRQ03
+
+
+       )
+
+113 
+       #SCORE603E_85C30_0_IRQ
+ 
+SCORE603E_IRQ04
+
+
+       )
+
+114 
+       #SCORE603E_RTC_IRQ
+ 
+SCORE603E_IRQ05
+
+
+       )
+
+115 
+       #SCORE603E_PCI_IRQ_0
+ 
+SCORE603E_IRQ06
+
+
+       )
+
+116 
+       #SCORE603E_PCI_IRQ_1
+ 
+SCORE603E_IRQ07
+
+
+       )
+
+117 
+       #SCORE603E_PCI_IRQ_2
+ 
+SCORE603E_IRQ08
+
+
+       )
+
+118 
+       #SCORE603E_PCI_IRQ_3
+ 
+SCORE603E_IRQ09
+
+
+       )
+
+119 
+       #SCORE603E_UNIVERSE_IRQ
+ 
+SCORE603E_IRQ10
+
+
+       )
+
+120 
+       #SCORE603E_1553_IRQ
+ 
+SCORE603E_IRQ11
+
+
+       )
+
+121 
+       #SCORE603E_MAIL_BOX_IRQ_0
+ 
+SCORE603E_IRQ12
+
+
+       )
+
+122 
+       #SCORE603E_MAIL_BOX_IRQ_1
+ 
+SCORE603E_IRQ13
+
+
+       )
+
+123 
+       #SCORE603E_MAIL_BOX_IRQ_2
+ 
+SCORE603E_IRQ14
+
+
+       )
+
+124 
+       #SCORE603E_MAIL_BOX_IRQ_3
+ 
+SCORE603E_IRQ15
+
+
+       )
+
+131 
+       #SCORE603E_IRQ16
+ ( 
+Sc?e_IRQ_F??
+ + 16 )
+
+       )
+
+132 
+       #SCORE603E_IRQ17
+ ( 
+Sc?e_IRQ_F??
+ + 17 )
+
+       )
+
+133 
+       #SCORE603E_IRQ18
+ ( 
+Sc?e_IRQ_F??
+ + 18 )
+
+       )
+
+134 
+       #SCORE603E_IRQ19
+ ( 
+Sc?e_IRQ_F??
+ + 19 )
+
+       )
+
+139 
+       #SCORE603E_85C30_4_IRQ
+ 
+SCORE603E_IRQ16
+
+
+       )
+
+140 
+       #SCORE603E_85C30_2_IRQ
+ 
+SCORE603E_IRQ17
+
+
+       )
+
+141 
+       #SCORE603E_85C30_5_IRQ
+ 
+SCORE603E_IRQ18
+
+
+       )
+
+142 
+       #SCORE603E_85C30_3_IRQ
+ 
+SCORE603E_IRQ19
+
+
+       )
+
+144 
+       #MAX_BOARD_IRQS
+ 
+SCORE603E_IRQ19
+
+
+       )
+
+146 

+BSP_?ems_?q_mng_??
+(
+?uId
+);
+
+148 #ifde?
+__?lu?lus
+
+
+       @irq/irq_init.c
+
+19 
+       ~<lib?u/io.h
+>
+
+20 
+       ~<lib?u/?r.h
+>
+
+21 
+       ~<b?/pci.h
+>
+
+22 
+       ~<b?/?sidu?.h
+>
+
+23 
+       ~<b?/?q.h
+>
+
+24 
+       ~<b?.h
+>
+
+25 
+       ~<b?/ve??s.h
+>
+
+26 
+       ~<?ems/b?Io.h
+>
+
+28 
+       #SHOW_ISA_PCI_BRIDGE_SETTINGS
+ 1
+
+       )
+
+29 
+       #SCAN_PCI_PRINT
+ 1
+
+       )
+
+30 
+       #TRACE_IRQ_INIT
+ 0
+
+       )
+
+33 
+       mbus
+;
+
+34 
+       mdevi?
+;
+
+35 
+       mfun?i?
+;
+
+36 } 
+       tpci_i?_bridge_devi?
+;
+
+38 
+pci_i?_bridge_devi?
+* 
+       gv?_82c586
+ = 0;
+
+40 

+ex???_ex??i?_ve??_??og_code_size
+[];
+
+41 

+ex???_ex??i?_ve??_??og_code
+();
+
+42 

+de?em??r_ex??i?_ve??_??og_code_size
+[];
+
+43 

+de?em??r_ex??i?_ve??_??og_code
+();
+
+45 
+       $IRQ_De?u?_?ems_?q_hdl
+(
+
+46 
+?ems_?q_hdl_??m
+ 
+?r
+
+
+49 
+       }
+}
+
+51 
+       $IRQ_De?u?_?ems_?q_?ab?
+(
+
+52 c?? 
+__?ems_?q_c???_d?a__
+ *
+?r
+
+
+55 
+       }
+}
+
+57 
+       $IRQ_De?u?_?ems_?q_di?b?
+(
+
+58 c?? 
+__?ems_?q_c???_d?a__
+ *
+?r
+
+
+61 
+       }
+}
+
+63 
+       $IRQ_De?u?_?ems_?q_is_?ab?d
+(
+
+64 c?? 
+__?ems_?q_c???_d?a__
+ *
+?r
+)
+
+67 
+       }
+}
+
+69 
+?ems_?q_c???_d?a
+ 
+       g?emsIrq
+[
+BSP_IRQ_NUMBER
+];
+
+70 
+?ems_?q_glob?_???gs
+ 
+       g???l_c?fig
+;
+
+72 
+?ems_?q_c???_d?a
+ 
+       gde?u?Irq
+ = {
+
+73 .
+?me
+ = 0,
+
+74 .
+       ghdl
+ = 
+IRQ_De?u?_?ems_?q_hdl
+,
+
+75 .
+       gh?d?
+ = 
+NULL
+,
+
+76 .
+       g?
+ = 
+IRQ_De?u?_?ems_?q_?ab?
+,
+
+77 .
+       g?
+ = 
+IRQ_De?u?_?ems_?q_di?b?
+,
+
+78 .
+       gisOn
+ = 
+IRQ_De?u?_?ems_?q_is_?ab?d
+
+
+81 
+?ems_?q_?io
+ 
+       g?qPrioTab?
+[
+BSP_IRQ_NUMBER
+];
+
+89 
+       $BSP_?ems_?q_mng_??
+(
+?uId
+)
+
+91 
+i
+;
+
+103 
+i
+ = 0; i < 
+BSP_IRQ_NUMBER
+; i++) {
+
+104 
+?qPrioTab?
+[
+i
+] = 8;
+
+105 
+?emsIrq
+[
+i
+] = 
+de?u?Irq
+;
+
+106 
+?emsIrq
+[
+i
+].
+?me
+ = i;
+
+107 #ifde?
+BSP_SHARED_HANDLER_SUPPORT
+
+
+108 
+?emsIrq
+[
+i
+].
+?xt_h?d?r
+ = 
+NULL
+;
+
+115 
+???l_c?fig
+.
+?qNb
+ = 
+BSP_IRQ_NUMBER
+;
+
+116 
+???l_c?fig
+.
+de?u?E?ry
+ = 
+de?u?Irq
+;
+
+117 
+???l_c?fig
+.
+?qHdlTbl
+ = 
+?emsIrq
+;
+
+118 
+???l_c?fig
+.
+?qBa?
+ = 
+BSP_LOWEST_OFFSET
+;
+
+119 
+???l_c?fig
+.
+?qPrioTbl
+ = 
+?qPrioTab?
+;
+
+121 i?(!
+       `BSP_?ems_?q_mngt_?t
+(&
+???l_c?fig
+)) {
+
+125 
+       `BSP_?nic
+("Unable?o initialize RTEMS interrupt Management!!! System?ocked\n");
+
+128 #ifde?
+TRACE_IRQ_INIT
+
+
+129 
+       `??tk
+("RTEMS IRQ management is?ow operational\n");
+
+131 
+       }
+}
+
+       @irq/no_pic.c
+
+13 
+       ~<?ems.h
+>
+
+14 
+       ~<b?.h
+>
+
+15 
+       ~<b?/?q.h
+>
+
+16 
+       ~<b?/?q_su?.h
+>
+
+17 
+       ~<b?/ve??s.h
+>
+
+19 
+?ems_?q_c???_d?a
+ *
+       g?ems_hdl_tbl
+;
+
+20 
+?ems_?q_c???_d?a
+ 
+       gd?t_??y
+;
+
+25 
+       $C_di??ch_?q_h?d?r
+(
+
+26 
+BSP_Ex??i?_?ame
+ *
+?ame
+,
+
+27 
+excNum
+
+
+30 
+?q
+;
+
+31 #i?(
+HAS_PMC_PSC8
+)
+
+32 
+u?t16_t
+ 
+check_?q
+;
+
+33 
+u?t16_t
+ 
+??us_w?d
+;
+
+36 i?(
+excNum
+ =?
+ASM_DEC_VECTOR
+) {
+
+37 
+       `b?_?q_di??ch_li?
+(
+?ems_hdl_tbl
+, 
+BSP_DECREMENTER
+, 
+d?t_??y
+.
+hdl
+);
+
+41 
+?q
+ = 
+       `?ad_?d_??r_?q
+();
+
+43 #i?(
+HAS_PMC_PSC8
+)
+
+44 i?(
+?q
+ =?
+SCORE603E_PCI_IRQ_0
+) {
+
+45 
+??us_w?d
+ = 
+       `?ad_?d_??r_PMC_?q
+?
+?q
+ );
+
+46 
+check_?q
+=
+SCORE603E_IRQ16
+; check_?q<=
+SCORE603E_IRQ19
+; check_irq++) {
+
+47 i??
+       `Is_PMC_IRQ
+?
+check_?q
+, 
+??us_w?d
+ )) {
+
+48 
+       `b?_?q_di??ch_li?_ba?
+(
+?ems_hdl_tbl
+, 
+check_?q
+, 
+d?t_??y
+.
+hdl
+);
+
+54 
+       `b?_?q_di??ch_li?_ba?
+(
+?ems_hdl_tbl
+, 
+?q
+, 
+d?t_??y
+.
+hdl
+);
+
+58 
+       }
+}
+
+61 
+       $BSP_?ab?_?q_?_pic
+(c?? 
+?ems_?q_numb?
+ 
+?q
+)
+
+63 
+u?t16_t
+ 
+vec_idx
+ = 
+?q
+ - 
+Sc?e_IRQ_F??
+;
+
+64 
+       `unmask_?q
+?
+vec_idx
+ );
+
+65 
+       }
+}
+
+68 
+       $BSP_di?b?_?q_?_pic
+(c?? 
+?ems_?q_numb?
+ 
+?q
+)
+
+70 
+u?t16_t
+ 
+vec_idx
+ = 
+?q
+ - 
+Sc?e_IRQ_F??
+;
+
+71 
+       `unmask_?q
+?
+vec_idx
+ );
+
+73 
+       }
+}
+
+76 
+       $BSP_?tup_the_pic
+(
+?ems_?q_glob?_???gs
+ *
+c?fig
+)
+
+78 
+d?t_??y
+ = 
+c?fig
+->
+de?u?E?ry
+;
+
+79 
+?ems_hdl_tbl
+ = 
+c?fig
+->
+?qHdlTbl
+;
+
+80 
+       `??_?q_d?a_?gi??
+();
+
+82 
+       }
+}
+
+       @startup/Hwr_init.c
+
+11 
+       ~<b?.h
+>
+
+13 
+       #PPC603e_SPR_HID0
+ 1008
+
+       )
+
+14 
+       #PPC603e_SPR_HID1
+ 1009
+
+       )
+
+15 
+       #PPC603e_SPR_IBAT0U
+ 528
+
+       )
+
+16 
+       #PPC603e_SPR_IBAT0L
+ 529
+
+       )
+
+17 
+       #PPC603e_SPR_DBAT0U
+ 536
+
+       )
+
+18 
+       #PPC603e_SPR_DBAT0L
+ 537
+
+       )
+
+19 
+       #PPC603e_SPR_IBAT1U
+ 530
+
+       )
+
+20 
+       #PPC603e_SPR_IBAT1L
+ 531
+
+       )
+
+21 
+       #PPC603e_SPR_DBAT1U
+ 538
+
+       )
+
+22 
+       #PPC603e_SPR_DBAT1L
+ 539
+
+       )
+
+23 
+       #PPC603e_SPR_IBAT2U
+ 532
+
+       )
+
+24 
+       #PPC603e_SPR_IBAT2L
+ 533
+
+       )
+
+25 
+       #PPC603e_SPR_DBAT2U
+ 540
+
+       )
+
+26 
+       #PPC603e_SPR_DBAT2L
+ 541
+
+       )
+
+27 
+       #PPC603e_SPR_IBAT3U
+ 534
+
+       )
+
+28 
+       #PPC603e_SPR_IBAT3L
+ 535
+
+       )
+
+29 
+       #PPC603e_SPR_DBAT3U
+ 542
+
+       )
+
+30 
+       #PPC603e_SPR_DBAT3L
+ 543
+
+       )
+
+31 
+       #PPC603e_SPR_DMISS
+ 976
+
+       )
+
+32 
+       #PPC603e_SPR_DCMP
+ 977
+
+       )
+
+33 
+       #PPC603e_SPR_HASH1
+ 978
+
+       )
+
+34 
+       #PPC603e_SPR_HASH2
+ 979
+
+       )
+
+35 
+       #PPC603e_SPR_IMISS
+ 980
+
+       )
+
+36 
+       #PPC603e_SPR_ICMP
+ 981
+
+       )
+
+37 
+       #PPC603e_SPR_RPA
+ 982
+
+       )
+
+38 
+       #PPC603e_SPR_SDR1
+ 25
+
+       )
+
+39 
+       #PPC603e_SPR_PVR
+ 287
+
+       )
+
+40 
+       #PPC603e_SPR_DAR
+ 19
+
+       )
+
+41 
+       #PPC603e_SPR_SPRG0
+ 272
+
+       )
+
+42 
+       #PPC603e_SPR_SPRG1
+ 273
+
+       )
+
+43 
+       #PPC603e_SPR_SPRG2
+ 274
+
+       )
+
+44 
+       #PPC603e_SPR_SPRG3
+ 275
+
+       )
+
+45 
+       #PPC603e_SPR_DSISR
+ 18
+
+       )
+
+46 
+       #PPC603e_SPR_SRR0
+ 26
+
+       )
+
+47 
+       #PPC603e_SPR_SRR1
+ 27
+
+       )
+
+48 
+       #PPC603e_SPR_TBL_WRITE
+ 284
+
+       )
+
+49 
+       #PPC603e_SPR_TBU_WRITE
+ 285
+
+       )
+
+50 
+       #PPC603e_SPR_DEC
+ 22
+
+       )
+
+51 
+       #PPC603e_SPR_IABR
+ 1010
+
+       )
+
+52 
+       #PPC603e_SPR_EAR
+ 282
+
+       )
+
+54 
+       #PCI_MEM_CMD
+ (
+SCORE603E_PCI_MEM_BASE
+ >> 16)
+
+       )
+
+57 
+u?t32_t
+ 
+       mcou??_1_100
+;
+
+58 
+u?t32_t
+ 
+       mcou??_hours
+;
+
+59 
+u?t32_t
+ 
+       mcou??_m?
+;
+
+60 
+u?t32_t
+ 
+       mcou??_?c
+;
+
+61 
+u?t32_t
+ 
+       mcou??_m?th
+;
+
+62 
+u?t32_t
+ 
+       mcou??_d?e
+;
+
+63 
+u?t32_t
+ 
+       mcou??_y?r
+;
+
+64 
+u?t32_t
+ 
+       mcou??_day_of_w?k
+;
+
+66 
+u?t32_t
+ 
+       mRAM_1_100
+;
+
+67 
+u?t32_t
+ 
+       mRAM_hours
+;
+
+68 
+u?t32_t
+ 
+       mRAM_m?th
+;
+
+69 
+u?t32_t
+ 
+       mRAM_d?e
+;
+
+70 
+u?t32_t
+ 
+       mRAM_y?r
+;
+
+71 
+u?t32_t
+ 
+       mRAM_day_of_w?k
+;
+
+73 
+u?t32_t
+ 
+       m??ru?_??us_mask
+;
+
+74 
+u?t32_t
+ 
+       mcomm?d_?gi??
+;
+
+75 }
+       tH?ris_RTC
+;
+
+77 
+       $??_RTC
+()
+
+79 v????
+H?ris_RTC
+ *
+the_RTC
+;
+
+81 
+the_RTC
+ = (v????
+H?ris_RTC
+ *)
+BSP_RTC_ADDRESS
+;
+
+83 
+the_RTC
+->
+comm?d_?gi??
+ = 0x0;
+
+84 
+       }
+}
+
+86 
+       $??_PCI
+()
+
+90 
+       }
+}
+
+92 
+       #PPC_G?_HID0
+?
+_v?ue
+ ) \
+
+94 
+_v?ue
+ = 0; \
+
+95 
+__asm__
+ volatile( \
+
+98 : "?" (
+_v?ue
+) \
+
+99 : "0" (
+_v?ue
+) \
+
+101 } 0)
+
+       )
+
+103 
+       #PPC_S?_HID0
+?
+_v?ue
+ ) \
+
+105 
+__asm__
+ volatile( \
+
+109 : "?" (
+_v?ue
+) \
+
+110 : "0" (
+_v?ue
+) \
+
+112 } 0)
+
+       )
+
+114 
+       $??ru?i?_?che_?ab?
+ ()
+
+116 
+u?t32_t
+ 
+v?ue
+;
+
+122 
+       `PPC_G?_HID0
+?
+v?ue
+ );
+
+124 
+v?ue
+ |= 0x00008000;
+
+126 
+       `PPC_S?_HID0
+?
+v?ue
+ );
+
+127 
+       }
+}
+
+129 
+       $d?a_?che_?ab?
+ ()
+
+131 
+u?t32_t
+ 
+v?ue
+;
+
+137 
+       `PPC_G?_HID0
+?
+v?ue
+ );
+
+139 
+v?ue
+ |= 0x00004000;
+
+141 
+       `PPC_S?_HID0
+?
+v?ue
+ );
+
+142 
+       }
+}
+
+       @startup/bspstart.c
+
+14 
+       ~<?r?g.h
+>
+
+16 
+       ~<b?.h
+>
+
+17 
+       ~<b?/bo??rd.h
+>
+
+18 
+       ~<?ems/libio.h
+>
+
+19 
+       ~<?ems/libcsu??t.h
+>
+
+20 
+       ~<?ems/b?Io.h
+>
+
+21 
+       ~<?ems/cou??.h
+>
+
+22 
+       ~<lib?u/?uId?t.h
+>
+
+23 
+       ~<b?/?q.h
+>
+
+25 
+       #DEBUG
+ 0
+
+       )
+
+30 
+       gBSP_h?p_??t
+;
+
+35 
+       gBSP_bus_?equ?cy
+;
+
+40 
+       gBSP_?o?ss?_?equ?cy
+;
+
+47 
+       gBSP_time_ba?_divis?
+ = 3960;
+
+52 
+u?t32_t
+ 
+       gb?_?icks_?r_u?c
+;
+
+57 

+RamSize
+[];
+
+58 
+u?t32_t
+ 
+       gBSP_mem_size
+;
+
+60 

+__?ems_?d
+[];
+
+62 
+       $BSP_?nic
+(*
+s
+)
+
+64 
+       `??tk
+("%?PANIC %s\n",
+_RTEMS_v?si?
+, 
+s
+);
+
+65 
+__asm__
+ 
+       `__v???e
+ ("sc");
+
+66 
+       }
+}
+
+68 
+       $_BSP_F??_?r?
+(
+v
+)
+
+70 
+       `??tk
+("%?PANIC ERROR %x\n",
+_RTEMS_v?si?
+, 
+v
+);
+
+71 
+__asm__
+ 
+       `__v???e
+ ("sc");
+
+72 
+       }
+}
+
+79 
+??_RTC
+();
+
+80 
+???lize_PMC
+();
+
+82 
+       $b?_?edriv?_hook
+()
+
+84 
+       `??_PCI
+();
+
+85 
+       `???lize_univ??
+();
+
+87 #i?
+DEBUG
+
+
+88 
+       `??tk
+("bsp_predriver_hook: initialize_PCI_bridge\n");
+
+90 
+       `???lize_PCI_bridge
+ ();
+
+92 #i?(
+HAS_PMC_PSC8
+)
+
+93 #i?
+DEBUG
+
+
+94 
+       `??tk
+("bsp_predriver_hook: initialize_PMC\n");
+
+96 
+       `???lize_PMC
+();
+
+99 #i?
+DEBUG
+
+
+100 
+       `??tk
+("bsp_predriver_hook: End of?outine\n");
+
+103 
+       }
+}
+
+110 
+       $???lize_PMC
+() {
+
+111 v????
+u?t32_t
+ *
+PMC_addr
+;
+
+112 
+u?t32_t
+ 
+d?a
+;
+
+117 
+PMC_addr
+ = 
+       `BSP_PCI_DEVICE_ADDRESS
+( 0x4 );
+
+118 *
+PMC_addr
+ = 0x020080cc;
+
+119 #i?
+DEBUG
+
+
+120 
+       `??tk
+("???lize_PMC: 0x%x = 0x%x\n", 
+PMC_addr
+, 0x020080cc);
+
+126 
+PMC_addr
+ = 
+       `BSP_PCI_DEVICE_ADDRESS
+( 0x14 );
+
+127 *
+PMC_addr
+ = (
+BSP_PCI_REGISTER_BASE
+ >> 24) & 0x3f;
+
+128 #i?
+DEBUG
+
+
+129 
+       `??tk
+("???lize_PMC: 0x%x = 0x%x\n", 
+PMC_addr
+, ((
+BSP_PCI_REGISTER_BASE
+ >> 24) & 0x3f));
+
+132 
+PMC_addr
+ = (v????
+u?t32_t
+*)
+
+133 
+       `BSP_PMC_SERIAL_ADDRESS
+( 0x100000 );
+
+134 
+d?a
+ = *
+PMC_addr
+;
+
+135 #i?
+DEBUG
+
+
+136 
+       `??tk
+("???lize_PMC: R?d 0x%x (0x%x)\n", 
+PMC_addr
+, 
+d?a
+ );
+
+137 
+       `??tk
+("???lize_PMC: R?d 0x%x (0x%x)\n", 
+PMC_addr
+, 
+d?a
+ & 0xfc );
+
+139 *
+PMC_addr
+ = 
+d?a
+ & 0xfc;
+
+140 
+       }
+}
+
+149 
+       $b?_??t
+( )
+
+151 
+m?_v?ue
+ = 0x0000;
+
+152 
+u???_t
+ 
+??S?ckS??
+;
+
+153 
+u???_t
+ 
+??S?ckSize
+;
+
+154 
+?c_?u_id_t
+ 
+myCpu
+;
+
+155 
+?c_?u_?visi?_t
+ 
+myCpuRevisi?
+;
+
+157 
+       `?ems_b?_d?ay
+( 1000 );
+
+162 #i?
+DEBUG
+
+
+163 
+       `??tk
+("bsp_start: Zero out?ots of memory\n");
+
+166 
+BSP_?o?ss?_?equ?cy
+ = 266000000;
+
+167 
+BSP_bus_?equ?cy
+ = 66000000;
+
+174 
+myCpu
+ = 
+       `g?_?c_?u_ty?
+();
+
+175 
+myCpuRevisi?
+ = 
+       `g?_?c_?u_?visi?
+();
+
+176 
+       `??tk
+("Cpu: 0x%x Revisi?: %d\n", 
+myCpu
+, 
+myCpuRevisi?
+);
+
+177 
+       `??tk
+("Cpu %s\n", 
+       `g?_?c_?u_ty?_?me
+(
+myCpu
+) );
+
+182 
+??S?ckS??
+ = (
+u???_t
+?
+__?ems_?d
+;
+
+183 
+??S?ckSize
+ = 
+       `?ems_c?figu?ti?_g?_???u?_?ack_size
+();
+
+184 
+       `??tk
+("Interrupt Stack Start: 0x%x Size: 0x%x Heap Start: 0x%x\n",
+
+185 
+??S?ckS??
+, 
+??S?ckSize
+, 
+BSP_h?p_??t
+
+
+188 
+BSP_mem_size
+ = (
+u?t32_t
+?
+RamSize
+;
+
+189 
+       `??tk
+("BSP_mem_size: %p\n", 
+RamSize
+ );
+
+194 
+       `?c_exc_???lize
+(
+??S?ckS??
+, 
+??S?ckSize
+);
+
+196 
+m?_v?ue
+ = 0x2030;
+
+197 
+       `_CPU_MSR_SET
+?
+m?_v?ue
+ );
+
+198 
+__asm__
+ volatile("sync; isync");
+
+203 #i?
+DEBUG
+
+
+204 
+       `??tk
+("bsp_start: set clicks?oer usec\n");
+
+206 
+b?_?icks_?r_u?c
+ = 66 / 4;
+
+207 
+       `?ems_cou??_???lize_c?v??r
+(
+b?_?icks_?r_u?c
+ * 1000000);
+
+209 #i?
+BSP_DATA_CACHE_ENABLED
+
+
+210 #i?
+DEBUG
+
+
+211 
+       `??tk
+("bsp_start: cache_enable\n");
+
+213 
+       `??ru?i?_?che_?ab?
+ ();
+
+214 
+       `d?a_?che_?ab?
+ ();
+
+215 #i?
+DEBUG
+
+
+216 
+       `??tk
+("bsp_start: END BSP_DATA_CACHE_ENABLED\n");
+
+223 #i?
+DEBUG
+
+
+224 
+       `??tk
+("bspstart: Call BSP_rtems_irq_mng_init\n");
+
+226 
+       `BSP_?ems_?q_mng_??
+(0);
+
+228 #i?
+DEBUG
+
+
+229 
+       `??tk
+("bsp_start:?nd BSPSTART\n");
+
+230 
+       `ShowBATS
+();
+
+232 
+       }
+}
+
+       @startup/genpvec.c
+
+13 
+       ~<b?.h
+>
+
+14 
+       ~<?ems/cha?.h
+>
+
+15 
+       ~<?ems/b?Io.h
+>
+
+16 
+       ~<as??.h
+>
+
+18 
+       ~<?dio.h
+>
+
+24 
+?ems_i?
+ 
+ex???_ex??i?_ISR
+ (
+
+25 
+?ems_ve??_numb?
+ 
+ve??
+
+
+28 
+       #NUM_LIRQ_HANDLERS
+ 20
+
+       )
+
+29 
+       #NUM_LIRQ
+ ( 
+MAX_BOARD_IRQS
+ - 
+PPC_IRQ_LAST
+ )
+
+       )
+
+37 
+?ems_cha?_node
+ 
+       mNode
+;
+
+38 
+?ems_i?_??y
+ 
+       mh?d?r
+;
+
+39 
+?ems_ve??_numb?
+ 
+       mve??
+;
+
+40 } 
+       tEE_ISR_Ty?
+;
+
+45 
+EE_ISR_Ty?
+ 
+       gISR_Nodes
+ [
+NUM_LIRQ_HANDLERS
+];
+
+46 
+u?t16_t
+ 
+       gNodes_U?d
+;
+
+47 
+?ems_cha?_c???
+ 
+       gISR_A?ay
+ [
+NUM_LIRQ
+];
+
+50 
+??_?q_d?a_?gi??
+();
+
+52 
+       $In?_EE_mask_??
+()
+
+54 
+       }
+}
+
+60 
+?ems_i?_??y
+ 
+       $?t_EE_ve??
+(
+
+61 
+?ems_i?_??y
+ 
+h?d?r
+,
+
+62 
+?ems_ve??_numb?
+ 
+ve??
+
+
+65 
+u?t16_t
+ 
+vec_idx
+ = 
+ve??
+ - 
+Sc?e_IRQ_F??
+;
+
+66 
+u?t32_t
+ 
+?dex
+;
+
+68 
+       `as??
+ (
+Nodes_U?d
+ < 
+NUM_LIRQ_HANDLERS
+);
+
+75  
+?dex
+=0 ; index <?
+Nodes_U?d
+ ; index++ ) {
+
+76 i??
+ISR_Nodes
+[
+?dex
+].
+ve??
+ == vector &&
+
+77 
+ISR_Nodes
+[
+?dex
+].
+h?d?r
+ == handler )
+
+78  
+NULL
+;
+
+85 
+Nodes_U?d
+++;
+
+87 
+?dex
+ = 
+Nodes_U?d
+ - 1;
+
+89 
+ISR_Nodes
+[
+?dex
+].
+h?d?r
+ = handler;
+
+90 
+ISR_Nodes
+[
+?dex
+].
+ve??
+ = vector;
+
+95 
+       `?ems_cha?_??nd
+?&
+ISR_A?ay
+[
+vec_idx
+], &
+ISR_Nodes
+[
+?dex
+].
+Node
+ );
+
+100 
+       `unmask_?q
+?
+vec_idx
+ );
+
+102  
+NULL
+;
+
+103 
+       }
+}
+
+108 
+?ems_i?
+ 
+       $ex???_ex??i?_ISR
+ (
+
+109 
+?ems_ve??_numb?
+ 
+ve??
+
+
+112 
+u?t16_t
+ 
+?dex
+;
+
+113 
+EE_ISR_Ty?
+ *
+node
+;
+
+114 
+u?t16_t
+ 
+v?ue
+;
+
+115 #i?(
+HAS_PMC_PSC8
+)
+
+116 
+u?t16_t
+ 
+PMC_?q
+;
+
+117 
+u?t16_t
+ 
+check_?q
+;
+
+118 
+u?t16_t
+ 
+??us_w?d
+;
+
+121 
+?dex
+ = 
+       `?ad_?d_??r_?q
+();
+
+122 i??
+?dex
+ >?
+NUM_LIRQ
+ ) {
+
+123 
+       `??tk
+?"ERROR:: Inv?id i??ru??umb? (%02x)\n", 
+?dex
+ );
+
+127 #i?(
+HAS_PMC_PSC8
+)
+
+128 
+PMC_?q
+ = 
+SCORE603E_PCI_IRQ_0
+ - 
+SCORE603E_IRQ00
+;
+
+130 i?(
+?dex
+ =?
+PMC_?q
+) {
+
+131 
+??us_w?d
+ = 
+       `?ad_?d_??r_PMC_?q
+?
+?dex
+ );
+
+133 
+check_?q
+=
+SCORE603E_IRQ16
+; check_?q<=
+SCORE603E_IRQ19
+; check_irq++) {
+
+134 i??
+       `Is_PMC_IRQ
+?
+check_?q
+, 
+??us_w?d
+ )) {
+
+135 
+?dex
+ = 
+check_?q
+ - 
+SCORE603E_IRQ00
+;
+
+136 
+node
+ = (
+EE_ISR_Ty?
+ *)(
+ISR_A?ay
+[ 
+?dex
+ ].
+f??
+);
+
+138 i??
+       `?ems_cha?_is_??
+?&
+ISR_A?ay
+[ 
+?dex
+ ], (*)
+node
+ ) ) {
+
+139 
+       `??tk
+ ("ERROR:: check %d i??ru? %02d ha?n?i?\n", 
+check_?q
+, 
+?dex
+);
+
+140 
+v?ue
+ = 
+       `g?_?q_mask
+();
+
+141 
+       `??tk
+(" Mask = %02x\n", 
+v?ue
+);
+
+143  !
+       `?ems_cha?_is_??
+?&
+ISR_A?ay
+[ 
+?dex
+ ], (*)
+node
+ ) ) {
+
+144 (*
+node
+->
+h?d?r
+)?node->
+ve??
+ );
+
+145 
+node
+ = (
+EE_ISR_Ty?
+ *?node->
+Node
+.
+?xt
+;
+
+153 
+node
+ = (
+EE_ISR_Ty?
+ *)(
+ISR_A?ay
+[ 
+?dex
+ ].
+f??
+);
+
+154 i??
+       `?ems_cha?_is_??
+?&
+ISR_A?ay
+[ 
+?dex
+ ], (*)
+node
+ ) ) {
+
+155 
+       `??tk
+?"ERROR:: i??ru? %02x ha?n?i?\n", 
+?dex
+);
+
+156 
+v?ue
+ = 
+       `g?_?q_mask
+();
+
+157 
+       `??tk
+(" Mask = %02x\n", 
+v?ue
+);
+
+160  !
+       `?ems_cha?_is_??
+?&
+ISR_A?ay
+[ 
+?dex
+ ], (*)
+node
+ ) ) {
+
+161 (*
+node
+->
+h?d?r
+)?node->
+ve??
+ );
+
+162 
+node
+ = (
+EE_ISR_Ty?
+ *?node->
+Node
+.
+?xt
+;
+
+166 
+       }
+}
+
+       @startup/vmeintr.c
+
+14 
+       ~<?ems.h
+>
+
+15 
+       ~<b?.h
+>
+
+16 
+       ~<?ems/vme??.h
+>
+
+21 
+       $VME_???u?_Di?b?
+(
+
+22 
+VME_???u?_Mask
+ 
+mask
+
+
+25 v????
+u?t8_t
+ *
+VME_???u?_?ab?
+;
+
+26 
+u?t8_t
+ 
+v?ue
+;
+
+28 
+VME_???u?_?ab?
+ = 0;
+
+29 
+v?ue
+ = *
+VME_???u?_?ab?
+;
+
+30 
+v?ue
+ &?~
+mask
+;
+
+31 *
+VME_???u?_?ab?
+ = 
+v?ue
+;
+
+32 
+       }
+}
+
+37 
+       $VME_???u?_E?b?
+(
+
+38 
+VME_???u?_Mask
+ 
+mask
+
+
+41 v????
+u?t8_t
+ *
+VME_???u?_?ab?
+;
+
+42 
+u?t8_t
+ 
+v?ue
+;
+
+44 
+VME_???u?_?ab?
+ = 0;
+
+45 
+v?ue
+ = *
+VME_???u?_?ab?
+;
+
+46 
+v?ue
+ |?
+mask
+;
+
+47 *
+VME_???u?_?ab?
+ = 
+v?ue
+;
+
+48 
+       }
+}
+
+       @timer/timer.c
+
+18 
+       ~<as??.h
+>
+
+20 
+       ~<b?.h
+>
+
+21 
+       ~<?ems/btim?.h
+>
+
+23 
+u?t64_t
+ 
+       gTim?_driv?_S??_time
+;
+
+25 
+bo?
+ 
+       gb?chm?k_tim?_f?d_av?age_ov?h?d
+;
+
+31 
+       $b?chm?k_tim?_???lize
+()
+
+38 
+Tim?_driv?_S??_time
+ = 
+       `PPC_G?_timeba?_?gi??
+();
+
+39 
+       }
+}
+
+45 
+b?chm?k_tim?_t
+ 
+       $b?chm?k_tim?_?ad
+()
+
+47 
+u?t64_t
+ 
+?icks
+;
+
+48 
+u?t64_t
+ 
+t??64
+;
+
+49 
+u?t32_t
+ 
+t??
+;
+
+53 
+?icks
+ = 
+       `PPC_G?_timeba?_?gi??
+();
+
+55 
+       `as??
+?
+?icks
+ > 
+Tim?_driv?_S??_time
+ );
+
+57 
+t??64
+ = 
+?icks
+ - 
+Tim?_driv?_S??_time
+;
+
+59 
+       `as??
+?
+t??64
+ <= 0xffffffff );
+
+61 
+t??
+ = (
+u?t32_t
+?
+t??64
+;
+
+63 i??
+b?chm?k_tim?_f?d_av?age_ov?h?d
+ =?
+?ue
+ )
+
+64  
+t??
+;
+
+66 i??
+t??
+ < 
+BSP_TIMER_LEAST_VALID
+ )
+
+69  
+       `BSP_C?v?t_de?em??r
+(
+t??
+ - 
+BSP_TIMER_AVG_OVERHEAD
+);
+
+70 
+       }
+}
+
+72 
+       $b?chm?k_tim?_di?b?_sub?a??g_av?age_ov?h?d
+(
+
+73 
+bo?
+ 
+f?d_?ag
+
+
+76 
+b?chm?k_tim?_f?d_av?age_ov?h?d
+ = 
+f?d_?ag
+;
+
+77 
+       }
+}
+
+       @tod/tod.c
+
+14 
+       ~<?ems.h
+>
+
+15 
+       ~<tod.h
+>
+
+16 
+       ~<b?.h
+>
+
+22 
+       #ICM1770_CRYSTAL_FREQ_32K
+ 0x00
+
+       )
+
+23 
+       #ICM1770_CRYSTAL_FREQ_1M
+ 0x01
+
+       )
+
+24 
+       #ICM1770_CRYSTAL_FREQ_2M
+ 0x02
+
+       )
+
+25 
+       #ICM1770_CRYSTAL_FREQ_4M
+ 0x03
+
+       )
+
+27 
+ICM7170_G?TOD
+(
+
+28 v????*
+imc1770_?gs
+,
+
+29 
+u?t8_t
+ 
+icm1770_?eq
+,
+
+30 
+?ems_time_of_day
+ *
+?c_tod
+
+
+32 
+ICM7170_S?TOD
+(
+
+33 v????*
+imc1770_?gs
+,
+
+34 
+u?t8_t
+ 
+icm1770_?eq
+,
+
+35 
+?ems_time_of_day
+ *
+?c_tod
+
+
+43 
+       $?tR?lTimeToRTEMS
+()
+
+45 
+?ems_time_of_day
+ 
+?c_tod
+;
+
+47 
+       `ICM7170_G?TOD
+?
+BSP_RTC_ADDRESS
+, 
+BSP_RTC_FREQUENCY
+, &
+?c_tod
+ );
+
+48 
+       `?ems_?ock_?t
+?&
+?c_tod
+ );
+
+49 
+       }
+}
+
+51 
+       $?tR?lTimeFromRTEMS
+()
+
+53 
+?ems_time_of_day
+ 
+?ems_tod
+;
+
+55 
+       `?ems_?ock_g?
+?
+RTEMS_CLOCK_GET_TOD
+, &
+?ems_tod
+ );
+
+56 
+       `ICM7170_S?TOD
+?
+BSP_RTC_ADDRESS
+, 
+BSP_RTC_FREQUENCY
+, &
+?ems_tod
+ );
+
+57 
+       }
+}
+
+59 
+       $checkR?lTime
+()
+
+61 
+?ems_time_of_day
+ 
+?ems_tod
+;
+
+62 
+?ems_time_of_day
+ 
+?c_tod
+;
+
+64 
+       `ICM7170_G?TOD
+?
+BSP_RTC_ADDRESS
+, 
+BSP_RTC_FREQUENCY
+, &
+?c_tod
+ );
+
+65 
+       `?ems_?ock_g?
+?
+RTEMS_CLOCK_GET_TOD
+, &
+?ems_tod
+ );
+
+67 if?
+?ems_tod
+.
+y?r
+ =?
+?c_tod
+.year &&
+
+68 
+?ems_tod
+.
+m?th
+ =?
+?c_tod
+.month &&
+
+69 
+?ems_tod
+.
+day
+ =?
+?c_tod
+.day ) {
+
+70  ((
+?ems_tod
+.
+hour
+ - 
+?c_tod
+.hour) * 3600) +
+
+71 ((
+?ems_tod
+.
+m?u?
+ - 
+?c_tod
+.minute) * 60) +
+
+72 (
+?ems_tod
+.
+?c?d
+ - 
+?c_tod
+.second);
+
+75 
+       }
+}
+
+82 
+       $ICM7170_G?F?ld
+(
+
+83 v????*
+imc1770_?gs
+,
+
+84 
+?g
+
+
+87 
+x
+;
+
+89 
+x
+ = 
+imc1770_?gs
+[
+?g
+*4];
+
+91  
+x
+;
+
+92 
+       }
+}
+
+94 
+       $ICM7170_S?F?ld
+(
+
+95 v????*
+imc1770_?gs
+,
+
+96 
+?g
+,
+
+97 
+d
+
+
+100 
+imc1770_?gs
+[
+?g
+*4] = 
+d
+;
+
+101 
+       }
+}
+
+103 
+       $ICM7170_G?TOD
+(
+
+104 v????*
+imc1770_?gs
+,
+
+105 
+u?t8_t
+ 
+icm1770_?eq
+,
+
+106 
+?ems_time_of_day
+ *
+?c_tod
+
+
+109 
+y?r
+;
+
+110 
+u?c
+;
+
+111 
+bo?
+ 
+??
+ = 
+?ue
+;
+
+114 i?(
+??
+ ) {
+
+115 
+       `ICM7170_S?F?ld
+?
+imc1770_?gs
+, 0x11, (0x0?| 
+icm1770_?eq
+) );
+
+116 
+??
+ = 
+?l?
+;
+
+122 
+u?c
+ = 
+       `ICM7170_G?F?ld
+?
+imc1770_?gs
+, 0x00 );
+
+124 
+y?r
+ = 
+       `ICM7170_G?F?ld
+?
+imc1770_?gs
+, 0x06 );
+
+125 i??
+y?r
+ >= 88 )
+
+126 
+y?r
+ += 1900;
+
+128 
+y?r
+ += 2000;
+
+130 
+?c_tod
+->
+y?r
+ = year;
+
+131 
+?c_tod
+->
+m?th
+ = 
+       `ICM7170_G?F?ld
+?
+imc1770_?gs
+, 0x04 );
+
+132 
+?c_tod
+->
+day
+ = 
+       `ICM7170_G?F?ld
+?
+imc1770_?gs
+, 0x05 );
+
+133 
+?c_tod
+->
+hour
+ = 
+       `ICM7170_G?F?ld
+?
+imc1770_?gs
+, 0x01 );
+
+134 
+?c_tod
+->
+m?u?
+ = 
+       `ICM7170_G?F?ld
+?
+imc1770_?gs
+, 0x02 );
+
+135 
+?c_tod
+->
+?c?d
+ = 
+       `ICM7170_G?F?ld
+?
+imc1770_?gs
+, 0x03 );
+
+136 
+?c_tod
+->
+ticks
+ = 
+       `ICM7170_G?F?ld
+?
+imc1770_?gs
+, 0x00 );
+
+137 
+       }
+}
+
+139 
+       $ICM7170_S?TOD
+(
+
+140 v????*
+imc1770_?gs
+,
+
+141 
+u?t8_t
+ 
+icm1770_?eq
+,
+
+142 
+?ems_time_of_day
+ *
+?c_tod
+
+
+145 
+y?r
+;
+
+147 
+y?r
+ = 
+?c_tod
+->year;
+
+148 i??
+y?r
+ >= 2088 )
+
+149 
+       `?ems_??l_?r?_occu?ed
+( 0xBAD0BAD0 );
+
+151 i??
+y?r
+ >= 2000 )
+
+152 
+y?r
+ -= 2000;
+
+154 
+y?r
+ -= 1900;
+
+156 
+       `ICM7170_S?F?ld
+?
+imc1770_?gs
+, 0x11, (0x04 |
+icm1770_?eq
+ ) );
+
+158 
+       `ICM7170_S?F?ld
+?
+imc1770_?gs
+, 0x06, 
+y?r
+ );
+
+159 
+       `ICM7170_S?F?ld
+?
+imc1770_?gs
+, 0x04, 
+?c_tod
+->
+m?th
+ );
+
+160 
+       `ICM7170_S?F?ld
+?
+imc1770_?gs
+, 0x05, 
+?c_tod
+->
+day
+ );
+
+161 
+       `ICM7170_S?F?ld
+?
+imc1770_?gs
+, 0x01, 
+?c_tod
+->
+hour
+ );
+
+162 
+       `ICM7170_S?F?ld
+?
+imc1770_?gs
+, 0x02, 
+?c_tod
+->
+m?u?
+ );
+
+163 
+       `ICM7170_S?F?ld
+?
+imc1770_?gs
+, 0x03, 
+?c_tod
+->
+?c?d
+ );
+
+169 
+       `ICM7170_S?F?ld
+?
+imc1770_?gs
+, 0x07, 1 );
+
+171 
+       `ICM7170_S?F?ld
+?
+imc1770_?gs
+, 0x11, (0x0?| 
+icm1770_?eq
+) );
+
+172 
+       }
+}
+
+       @vme/VMEConfig.h
+
+1 #i?de?
+RTEMS_BSP_VME_CONFIG_H
+
+
+2 
+       #RTEMS_BSP_VME_CONFIG_H
+
+
+       )
+
+63 #unde?
+BSP_VME_BAT_IDX
+
+
+65 
+       #_VME_A32_WIN0_ON_PCI
+ 0x10000000
+
+       )
+
+66 
+       #_VME_A24_ON_PCI
+ 0x1f000000
+
+       )
+
+67 
+       #_VME_A16_ON_PCI
+ 0x1fff0000
+
+       )
+
+72 
+       #_VME_A32_WIN0_ON_VME
+ 0x20000000
+
+       )
+
+78 #unde?
+_VME_DRAM_OFFSET
+
+
+85 #unde?
+_VME_CSR_ON_PCI
+
+
+87 #unde?
+BSP_PCI_VME_DRIVER_DOES_EOI
+
+
+89 

+BSP_VMEIn?
+();
+
+90 

+BSP_VMEIrqMgrIn??l
+();
+
+92 
+       #BSP_VME_UNIVERSE_INSTALL_IRQ_MGR
+(
+?r
+) \
+
+94 
+?r
+ = 
+       `vmeUniv??In??lIrqMgr
+(0,5,1,6); \
+
+95 } 0)
+
+       )
+
+       @
+1
+.
+0
+24
+370
+PCI_bus/PCI.c
+PCI_bus/PCI.h
+PCI_bus/flash.c
+PCI_bus/universe.c
+console/85c30.c
+console/85c30.h
+console/console.c
+console/consolebsp.h
+console/tbl85c30.c
+include/bsp.h
+include/gen2.h
+include/tm27.h
+irq/FPGA.c
+irq/irq.c
+irq/irq.h
+irq/irq_init.c
+irq/no_pic.c
+startup/Hwr_init.c
+startup/bspstart.c
+startup/genpvec.c
+startup/vmeintr.c
+timer/timer.c
+tod/tod.c
+vme/VMEConfig.h
diff --git a/c/src/lib/libbsp/powerpc/score603e/include/bsp.h 
b/c/src/lib/libbsp/powerpc/score603e/include/bsp.h
index f6e3c5a..dc78498 100644
--- a/c/src/lib/libbsp/powerpc/score603e/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/score603e/include/bsp.h
@@ -1,8 +1,9 @@
-/*  bsp.h
- *
+/*
  *  This include file contains all board IO definitions.
- *
- *  COPYRIGHT (c) 1989-2009.
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-2014.
  *  On-Line Applications Research Corporation (OAR).
  *
  *  The license and distribution terms for this file may be
@@ -123,68 +124,55 @@ rtems_isr_entry  set_EE_vector(
   rtems_isr_entry     handler,                  /* isr routine        */
   rtems_vector_number vector                    /* vector number      */
 );
-void initialize_external_exception_vector ();
+void initialize_external_exception_vector(void);
 
 /*
  * Hwr_init.c
  */
-void init_PCI();
-void instruction_cache_enable ();
-void data_cache_enable ();
+void init_PCI(void);
+void init_RTC(void);
+void instruction_cache_enable(void);
+void data_cache_enable(void);
 
-void initialize_PCI_bridge ();
-uint16_t         read_and_clear_irq ();
-void set_irq_mask(
-  uint16_t         value
-);
-uint16_t         get_irq_mask();
+void     initialize_PCI_bridge(void);
+uint16_t read_and_clear_irq(void);
+void     set_irq_mask(uint16_t value);
+uint16_t get_irq_mask(void);
 
 /*
  * universe.c
  */
-void initialize_universe();
-
-void set_irq_mask(
-  uint16_t         value
-);
-
-uint16_t         get_irq_mask();
-
-void unmask_irq(
-  uint16_t         irq_idx
-);
-
-void mask_irq(
-  uint16_t         irq_idx
-);
-
-void init_irq_data_register();
-
-uint16_t         read_and_clear_PMC_irq(
-  uint16_t            irq
-);
-
-bool Is_PMC_IRQ(
-  uint32_t           pmc_irq,
-  uint16_t           status_word
-);
-
-uint16_t         read_and_clear_irq();
+void     initialize_universe(void);
+void     set_irq_mask(uint16_t value);
+uint16_t get_irq_mask(void);
+void     unmask_irq(uint16_t irq_idx);
+void     mask_irq(uint16_t irq_idx);
+void     init_irq_data_register(void);
+uint16_t read_and_clear_PMC_irq(uint16_t irq);
+bool     Is_PMC_IRQ( uint32_t pmc_irq, uint16_t status_word);
+uint16_t read_and_clear_irq(void);
+void set_vme_base_address(uint32_t base_address);
+uint32_t get_vme_slave_size(void);
+void set_vme_slave_size (uint32_t size);
 
 /*
  * FPGA.c
  */
-void initialize_PCI_bridge ();
+void initialize_PCI_bridge(void);
+void init_irq_data_register(void);
+uint32_t Read_pci_device_register(uint32_t address);
+void  Write_pci_device_register(uint32_t address, uint32_t data);
 
 /* flash.c */
+unsigned int SCORE603e_FLASH_Disable(uint32_t unused);
+unsigned int SCORE603e_FLASH_verify_enable(void);
+unsigned int SCORE603e_FLASH_Enable_writes(uint32_t area);
 
-unsigned int SCORE603e_FLASH_Disable(
-  uint32_t                       unused
-);
-unsigned int SCORE603e_FLASH_verify_enable();
-unsigned int SCORE603e_FLASH_Enable_writes(
-  uint32_t                       area        /* Unused  */
-);
+/*
+ * PCI.c
+ */
+uint32_t PCI_bus_read(volatile uint32_t *_addr);
+void PCI_bus_write(volatile uint32_t *_addr, uint32_t _data);
 
 #define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
 #define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )
diff --git a/c/src/lib/libbsp/powerpc/score603e/irq/FPGA.c 
b/c/src/lib/libbsp/powerpc/score603e/irq/FPGA.c
index 33e22de..9c08d1d 100644
--- a/c/src/lib/libbsp/powerpc/score603e/irq/FPGA.c
+++ b/c/src/lib/libbsp/powerpc/score603e/irq/FPGA.c
@@ -1,6 +1,9 @@
-/*  FPGA.c -- Bridge for second and subsequent generations
- *
- *  COPYRIGHT (c) 1989-2009.
+/*
+ * FPGA.c -- Bridge for second and subsequent generations
+ */
+
+/*
+ *  COPYRIGHT (c) 1989-2014.
  *  On-Line Applications Research Corporation (OAR).
  *
  *  The license and distribution terms for this file may be
@@ -120,7 +123,7 @@ void init_irq_data_register(void)
   }
 }
 
-uint16_t         read_and_clear_PMC_irq(
+uint16_t read_and_clear_PMC_irq(
   uint16_t            irq
 )
 {
-- 
1.9.3

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