@Mousius I totally agree to make things hygiene, and believe folding things 
into Target is the correct and consistent approach.

First of all, the automation system solely relies on the target object to 
understand the code dispatching, hardware specs and runtime information. 
Without having the information in the Target object, the automation system 
won't be aware of the full picture. For example, if we switch executor from VM 
to TensorRT, the performance can be much different, and so if executor is not 
inside Target, then the automation system will be confused and learn a wrong 
objective.

Second, as the direction we are moving towards, the Target object is guiding 
our IRModule-to-IRModule transformation in lowering, and IRModule-to-Module in 
compilation. Wrapping with an extra layer seems to architecturally change our 
compilation pipeline, while alternatives do exist and both seem to be 
equivalently expressive.

Third, the practice folding all compilation-related information has been 
adopted consistently in TVM. For example, we may specify the libraries 
dispatched to via `cuda --libs=cudnn`. Similarly in LLVM, the target triple is 
designed in a consistent way, where we could specify libc and other 
environments.

Historically, fragmentation accumulates in TVM across layers. For example, we 
have different scheduling and auto scheduling system, 
slightly-but-not-identical and error-prone APIs for different executors, 
compilation workflow between relay, relay byoc and tvm, etc. Adding new 
top-level user-facing data structures, if alternative exists with the same 
expressiveness and UX, then I would say it would probably lead to more user 
confusion.

On the other hand, I totally agree and am aware that a graph-level compile 
involves the interaction of multiple parts, including device, host, runtime and 
executor. The main concern from me here is that we already have Target as a 
canonical spec formally, which is already able to express this structure 
without hurting UX.





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