@isong @hht Thank you so much for your reply. I think I found a problem. When I run the tutorial "Deploy Pretrained Vision Model from MxNet on VTA", I could write a bitstream file to FPGA, and it worked well. I've written vta.program_fpga(remote, bitstream="bitfiles/v4/1x16_i8w8a32_15_15_18_17.bit") in the sample code. I've checked it through dmesg.
However, when I run the tutorial "Auto-tuning a convolutional network on VTA" (tune_relay_vta_with_one_board.py), I couldn't write a bitstream file to FPGA. During the tuning, it seems to access the program_fpga function of rpc_client.py per 8 iterations and get the bitstream="/home/taeho/.vta_cache/pynq/0_0_1/1x16_i8w8a32_15_15_18_17.bit". When I checked dmesg from my pynq board, it failed to write a bitstream to FPGA. I couldn't find the exact reason. For the tutorial "Deploy Pretrained Vision Model from MxNet on VTA", I've run "sudo apps/vta_rpc/start_rpc_server.sh" on pynq. For tune_relay_vta_with_one_board.py, I've run "sudo apps/vta_rpc/start_rpc_server_to_tracker.sh" on pynq. @hht I'm not sure if it is correct to start remote device server with root. Again, thank you so much for your help! --- [Visit Topic](https://discuss.tvm.apache.org/t/vta-workaround-for-autotuning-with-one-pynq-z1-board/8091/14) to respond. You are receiving this because you enabled mailing list mode. To unsubscribe from these emails, [click here](https://discuss.tvm.apache.org/email/unsubscribe/9ae87f3a660b8e5972aab00e6e54c904238a51cc1cde642b44bb583188e9542c).
