The hardware tracks a single queue depth across all Tx queues, so each
queue must be validated against the first one and forced to match on
mismatch instead of silently diverging. Also reset the rx/tx queue states
in dev_stop and clear the cached depths so the queue state reflects the
stopped device before the next start.

Signed-off-by: Jiacheng Ye <[email protected]>
---
 drivers/net/hinic3/hinic3_ethdev.c | 16 ++++++++++++++--
 drivers/net/hinic3/hinic3_ethdev.h |  4 ++++
 2 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/net/hinic3/hinic3_ethdev.c 
b/drivers/net/hinic3/hinic3_ethdev.c
index b64746664d..b2f1d618c0 100644
--- a/drivers/net/hinic3/hinic3_ethdev.c
+++ b/drivers/net/hinic3/hinic3_ethdev.c
@@ -316,8 +316,6 @@ hinic3_xstats_calc_num(struct hinic3_nic_dev *nic_dev)
        }
 }
 
-#define HINIC3_MAX_QUEUE_DEPTH 16384
-#define HINIC3_MIN_QUEUE_DEPTH 128
 #define HINIC3_TXD_ALIGN       1
 #define HINIC3_RXD_ALIGN       1
 
@@ -1322,6 +1320,14 @@ hinic3_tx_queue_setup(struct rte_eth_dev *dev, uint16_t 
qid, uint16_t nb_desc,
 
        nic_dev = HINIC3_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
        hwdev = nic_dev->hwdev;
+       /* Queue depth must be equal to first queue */
+       if (nic_dev->txq_depth == 0) {
+               nic_dev->txq_depth = nb_desc;
+       } else if (nb_desc != nic_dev->txq_depth) {
+               PMD_DRV_LOG(WARNING, "txq%u depth:%u is not equal to first 
queue depth:%u.",
+                       qid, nb_desc, nic_dev->txq_depth);
+               nb_desc = nic_dev->txq_depth;
+       }
 
        /* Queue depth must be power of 2, otherwise will be aligned up. */
        sq_depth = (nb_desc & (nb_desc - 1))
@@ -2231,7 +2237,13 @@ hinic3_dev_stop(struct rte_eth_dev *dev)
        /* Free mempool. */
        hinic3_copy_mempool_uninit(nic_dev);
 
+       for (uint16_t i = 0; i < dev->data->nb_rx_queues; i++)
+               dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
+       for (uint16_t i = 0; i < dev->data->nb_tx_queues; i++)
+               dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
+
        nic_dev->rxq_depth = 0;
+       nic_dev->txq_depth = 0;
        return 0;
 }
 
diff --git a/drivers/net/hinic3/hinic3_ethdev.h 
b/drivers/net/hinic3/hinic3_ethdev.h
index 92c7d44741..72337230c8 100644
--- a/drivers/net/hinic3/hinic3_ethdev.h
+++ b/drivers/net/hinic3/hinic3_ethdev.h
@@ -15,6 +15,9 @@
 
 #define HINIC3_PMD_DRV_VERSION "B106"
 
+#define HINIC3_MAX_QUEUE_DEPTH         16384
+#define HINIC3_MIN_QUEUE_DEPTH         128
+
 #define PCI_DEV_TO_INTR_HANDLE(pci_dev) ((pci_dev)->intr_handle)
 
 #define HINIC3_PKT_RX_L4_CKSUM_BAD     RTE_MBUF_F_RX_L4_CKSUM_BAD
@@ -149,6 +152,7 @@ struct hinic3_nic_dev {
        uint16_t max_rqs;
 
        uint16_t rxq_depth;
+       uint16_t txq_depth;
        uint16_t rx_buff_len;
        uint16_t mtu_size;
 
-- 
2.33.0

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