Acked-by: Nicolas Chautru <[email protected]>

> -----Original Message-----
> From: Stephen Hemminger <[email protected]>
> Sent: Thursday, October 8, 2026 4:35 PM
> To: [email protected]
> Cc: Stephen Hemminger <[email protected]>; Chautru, Nicolas
> <[email protected]>
> Subject: [PATCH v3 06/29] drivers/baseband: convert rte_smp_rmb to fence
> 
> Replace deprecated rte_smp_rmb with equivalent
> rte_atomic_thread_fence(rte_memory_order_acquire).
> 
> Signed-off-by: Stephen Hemminger <[email protected]>
> ---
>  drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c |  8 ++++----
>  drivers/baseband/fpga_lte_fec/fpga_lte_fec.c       | 12 ++++++------
>  2 files changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c
> b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c
> index 45bd171ca7..e804be4cea 100644
> --- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c
> +++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c
> @@ -2662,7 +2662,7 @@ vc_5gnr_dequeue_ldpc_enc_one_op_cb(struct
> fpga_5gnr_queue *q, struct rte_bbdev_e
>               return -1;
> 
>       /* make sure the response is read atomically */
> -     rte_smp_rmb();
> +     rte_atomic_thread_fence(rte_memory_order_acquire);
> 
>       rte_bbdev_log_debug("DMA response desc %p", desc);
> 
> @@ -2691,7 +2691,7 @@ agx100_dequeue_ldpc_enc_one_op_cb(struct
> fpga_5gnr_queue *q, struct rte_bbdev_en
>               return -1;
> 
>       /* make sure the response is read atomically. */
> -     rte_smp_rmb();
> +     rte_atomic_thread_fence(rte_memory_order_acquire);
> 
>       rte_bbdev_log_debug("DMA response desc %p", desc);
> 
> @@ -2723,7 +2723,7 @@ vc_5gnr_dequeue_ldpc_dec_one_op_cb(struct
> fpga_5gnr_queue *q, struct rte_bbdev_d
>               return -1;
> 
>       /* make sure the response is read atomically */
> -     rte_smp_rmb();
> +     rte_atomic_thread_fence(rte_memory_order_acquire);
> 
>  #ifdef RTE_LIBRTE_BBDEV_DEBUG
>       vc_5gnr_print_dma_dec_desc_debug_info(desc);
> @@ -2769,7 +2769,7 @@ agx100_dequeue_ldpc_dec_one_op_cb(struct
> fpga_5gnr_queue *q, struct rte_bbdev_de
>               return -1;
> 
>       /* make sure the response is read atomically. */
> -     rte_smp_rmb();
> +     rte_atomic_thread_fence(rte_memory_order_acquire);
> 
>  #ifdef RTE_LIBRTE_BBDEV_DEBUG
>       agx100_print_dma_dec_desc_debug_info(desc);
> diff --git a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c
> b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c
> index 04ac445820..cb3f29c10b 100644
> --- a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c
> +++ b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c
> @@ -2093,7 +2093,7 @@ dequeue_enc_one_op_cb(struct fpga_queue *q,
> struct rte_bbdev_enc_op **op,
>               return -1;
> 
>       /* make sure the response is read atomically */
> -     rte_smp_rmb();
> +     rte_atomic_thread_fence(rte_memory_order_acquire);
> 
>       rte_bbdev_log_debug("DMA response desc %p", desc);
> 
> @@ -2123,7 +2123,7 @@ dequeue_enc_one_op_tb(struct fpga_queue *q,
> struct rte_bbdev_enc_op **op,
>               return -1;
> 
>       /* Make sure the response is read atomically */
> -     rte_smp_rmb();
> +     rte_atomic_thread_fence(rte_memory_order_acquire);
> 
>       /* Verify if done bit in all CBs is set */
>       cbs_in_op = desc->enc_req.cbs_in_op;
> @@ -2135,7 +2135,7 @@ dequeue_enc_one_op_tb(struct fpga_queue *q,
> struct rte_bbdev_enc_op **op,
>       }
> 
>       /* Make sure the response is read atomically */
> -     rte_smp_rmb();
> +     rte_atomic_thread_fence(rte_memory_order_acquire);
> 
>       for (cb_idx = 0; cb_idx < cbs_in_op; ++cb_idx) {
>               desc = q->ring_addr + ((q->head_free_desc + desc_offset +
> @@ -2166,7 +2166,7 @@ dequeue_dec_one_op_cb(struct fpga_queue *q,
> struct rte_bbdev_dec_op **op,
>               return -1;
> 
>       /* make sure the response is read atomically */
> -     rte_smp_rmb();
> +     rte_atomic_thread_fence(rte_memory_order_acquire);
> 
>  #ifdef RTE_LIBRTE_BBDEV_DEBUG
>       print_dma_dec_desc_debug_info(desc);
> @@ -2201,7 +2201,7 @@ dequeue_dec_one_op_tb(struct fpga_queue *q,
> struct rte_bbdev_dec_op **op,
>               return -1;
> 
>       /* Make sure the response is read atomically */
> -     rte_smp_rmb();
> +     rte_atomic_thread_fence(rte_memory_order_acquire);
> 
>       /* Verify if done bit in all CBs is set */
>       cbs_in_op = desc->dec_req.cbs_in_op;
> @@ -2213,7 +2213,7 @@ dequeue_dec_one_op_tb(struct fpga_queue *q,
> struct rte_bbdev_dec_op **op,
>       }
> 
>       /* Make sure the response is read atomically */
> -     rte_smp_rmb();
> +     rte_atomic_thread_fence(rte_memory_order_acquire);
> 
>       for (cb_idx = 0; cb_idx < cbs_in_op; ++cb_idx) {
>               desc = q->ring_addr + ((q->head_free_desc + desc_offset +
> --
> 2.53.0

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