On Tue, Jul 07, 2026 at 08:20:45PM -0400, [email protected] wrote:
> From: Sandeep Penigalapati <[email protected]>
>
> This fixes two issues in the i40e Flow Director flexible payload path.
>
> The bitmask array bound was checked after the write to
> bitmask[nb_bitmask], allowing a one-slot out-of-bounds write when the
> number of partial-mask words exceeds I40E_FDIR_BITMASK_NUM_WORD. Move
> the check before the write and use '>=' so the array is never indexed
> out of bounds.
>
> In addition, i40e_flow_set_fdir_flex_pit() programs the global GLQF_ORT
> register, which is shared by all PFs on the NIC. It was called before
> the flex mask was validated, so a rule that is later rejected still left
> the global register modified, affecting other PFs. Validate the flex
> mask first and only touch the hardware registers once it has passed.
>
> Fixes: 6ced3dd72f5f ("net/i40e: support flexible payload parsing for FDIR")
> Cc: [email protected]
> Signed-off-by: Sandeep Penigalapati <[email protected]>
> ---
> drivers/net/intel/i40e/i40e_fdir.c | 23 +++++++++++++++--------
> 1 file changed, 15 insertions(+), 8 deletions(-)
>
Acked-by: Bruce Richardson <[email protected]>
