On Wed, May 20, 2026 at 12:52:42PM +0000, Ciara Loftus wrote:
> From: Vitaly Lifshits <[email protected]>
>
> The GbE autonomous power gating feature was added to support G3 to S5
> flow. However, this changed the reset value of DPG_EN bit to 1, causing
> a possible autonomous transition to power gating state during D0. This
> might result in undefined errors such as: packet loss, packet corruption
> and Tx/Rx hangs. Therefore, clear DPG_EN bit after hardware reset flow.
>
> Signed-off-by: Vitaly Lifshits <[email protected]>
> Signed-off-by: Ciara Loftus <[email protected]>
> ---
Seems like a bug fix needing backport. Will add fixes tag and CC stable on
apply.
Fixes: 5a32a257f957 ("e1000: more NICs in base driver")
> drivers/net/intel/e1000/base/e1000_defines.h | 1 +
> drivers/net/intel/e1000/base/e1000_ich8lan.c | 7 +++++++
> 2 files changed, 8 insertions(+)
>
> diff --git a/drivers/net/intel/e1000/base/e1000_defines.h
> b/drivers/net/intel/e1000/base/e1000_defines.h
> index eb93675823..6c710300a6 100644
> --- a/drivers/net/intel/e1000/base/e1000_defines.h
> +++ b/drivers/net/intel/e1000/base/e1000_defines.h
> @@ -36,6 +36,7 @@
>
> /* Extended Device Control */
> #define E1000_CTRL_EXT_LPCD 0x00000004 /* LCD Power Cycle Done */
> +#define E1000_CTRL_EXT_DPG_EN 0x00000008 /* Dynamic Power
> Gating Enable */
> #define E1000_CTRL_EXT_SDP4_DATA 0x00000010 /* SW Definable Pin 4 data */
> #define E1000_CTRL_EXT_SDP6_DATA 0x00000040 /* SW Definable Pin 6 data */
> #define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* SW Definable Pin 3 data */
> diff --git a/drivers/net/intel/e1000/base/e1000_ich8lan.c
> b/drivers/net/intel/e1000/base/e1000_ich8lan.c
> index 6190052368..96b9ad6a70 100644
> --- a/drivers/net/intel/e1000/base/e1000_ich8lan.c
> +++ b/drivers/net/intel/e1000/base/e1000_ich8lan.c
> @@ -5107,6 +5107,13 @@ STATIC s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
> reg |= E1000_KABGTXD_BGSQLBIAS;
> E1000_WRITE_REG(hw, E1000_KABGTXD, reg);
>
> + if (hw->mac.type >= e1000_pch_ptp) {
> + DEBUGOUT("Clearing DPG EN bit post reset\n");
> + reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
> + reg &= ~E1000_CTRL_EXT_DPG_EN;
> + E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg);
> + }
> +
> return E1000_SUCCESS;
> }
>
> --
> 2.43.0
>
