On Wed, Jan 28, 2026 at 11:44 AM Rahul Bhansali <[email protected]> wrote: > > With compiler option '-Wduplicated-branches', getting few > warnings such as "this condition has identical branches". > > Macros are updated to address these warnings. > > Bugzilla ID: 1811 > Fixes: 0d9e323bacf0 ("common/cnxk: support for CN20K inline IPsec") > Fixes: c045d2e5cbbc ("common/cnxk: add CPT configuration") > > Signed-off-by: Rahul Bhansali <[email protected]>
Please check AI the comments in https://patches.dpdk.org/project/dpdk/patch/[email protected]/ 1)Please fix Is it candidate for Cc: [email protected] backport? common/cnxk: fix engine capabilities fetch logic common/cnxk: fix CPT CQ roll over handling common/cnxk: fix duplicate branch compiler warning 2)Add new feature to release notes 3)Some of the changes are fixes: and mark the as fixes > --- > drivers/common/cnxk/hw/rvu.h | 2 ++ > drivers/common/cnxk/roc_cpt.c | 7 +++---- > drivers/common/cnxk/roc_nix_inl.c | 25 +++++++++---------------- > drivers/common/cnxk/roc_nix_inl_dev.c | 6 +----- > drivers/common/cnxk/roc_nix_inl_dp.h | 3 +++ > drivers/common/cnxk/roc_nix_priv.h | 4 ++-- > 6 files changed, 20 insertions(+), 27 deletions(-) > > diff --git a/drivers/common/cnxk/hw/rvu.h b/drivers/common/cnxk/hw/rvu.h > index ed2ba996e0..6f02d1e3d2 100644 > --- a/drivers/common/cnxk/hw/rvu.h > +++ b/drivers/common/cnxk/hw/rvu.h > @@ -105,6 +105,8 @@ > #define RVU_VF_MBOX_REGION (0xc0000ull) /* [CN10K, .) */ > #define RVU_VF_MSIX_PBAX(a) (0xf0000ull | (uint64_t)(a) << 3) > > +#define RVU_BLOCK_ADDRX_DISC(a) RVU_PF_BLOCK_ADDRX_DISC(a) > + > /* CN20k RVU mbox registers */ > #define RVU_MBOX_AF_AFPFX_TRIGX(a) (0x9000 | (a) << 3) > #define RVU_MBOX_PF_PFAF_TRIGX(a) RVU_PF_PFAF_MBOXX(a) > diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c > index 63419884ac..13eb9d3767 100644 > --- a/drivers/common/cnxk/roc_cpt.c > +++ b/drivers/common/cnxk/roc_cpt.c > @@ -677,10 +677,9 @@ cpt_get_blkaddr(struct dev *dev) > * attached to. Assume CPT LF's of only one block are attached > * to a pffunc. > */ > - if (dev_is_vf(dev)) > - off = RVU_VF_BLOCK_ADDRX_DISC(RVU_BLOCK_ADDR_CPT1); > - else > - off = RVU_PF_BLOCK_ADDRX_DISC(RVU_BLOCK_ADDR_CPT1); > + > + /* PF and VF block address offset is same, hence using common offset > */ > + off = RVU_BLOCK_ADDRX_DISC(RVU_BLOCK_ADDR_CPT1); > > reg = plt_read64(dev->bar2 + off); > > diff --git a/drivers/common/cnxk/roc_nix_inl.c > b/drivers/common/cnxk/roc_nix_inl.c > index aad2631673..a21c40acf1 100644 > --- a/drivers/common/cnxk/roc_nix_inl.c > +++ b/drivers/common/cnxk/roc_nix_inl.c > @@ -19,6 +19,10 @@ PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_INB_SA_SZ == > PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_INB_SA_SZ == 1024); > PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_OUTB_SA_SZ == > 1UL << ROC_NIX_INL_OT_IPSEC_OUTB_SA_SZ_LOG2); > +PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_INB_SA_SZ == > ROC_NIX_INL_OW_IPSEC_INB_SA_SZ); > +PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_INB_SA_SZ == > ROC_NIX_INL_ON_IPSEC_INB_SA_SZ); > +PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_OUTB_SA_SZ == > ROC_NIX_INL_OW_IPSEC_OUTB_SA_SZ); > +PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_OUTB_SA_SZ == > ROC_NIX_INL_ON_IPSEC_OUTB_SA_SZ); > > static int > nix_inl_meta_aura_destroy(struct roc_nix *roc_nix) > @@ -427,12 +431,8 @@ nix_inl_inb_ipsec_sa_tbl_setup(struct roc_nix *roc_nix) > /* CN9K SA size is different */ > if (roc_nix->custom_inb_sa) > inb_sa_sz = ROC_NIX_INL_INB_CUSTOM_SA_SZ; > - else if (roc_model_is_cn9k()) > - inb_sa_sz = ROC_NIX_INL_ON_IPSEC_INB_SA_SZ; > - else if (roc_model_is_cn10k()) > - inb_sa_sz = ROC_NIX_INL_OT_IPSEC_INB_SA_SZ; > else > - inb_sa_sz = ROC_NIX_INL_OW_IPSEC_INB_SA_SZ; > + inb_sa_sz = ROC_NIX_INL_IPSEC_INB_SA_SZ; > > /* Alloc contiguous memory for Inbound SA's */ > nix->inb_sa_sz[profile_id] = inb_sa_sz; > @@ -1198,10 +1198,9 @@ nix_inl_eng_caps_get(struct nix *nix) > inst.rptr = (uint64_t)rptr; > inst.w4.s.opcode_major = ROC_LOADFVC_MAJOR_OP; > inst.w4.s.opcode_minor = ROC_LOADFVC_MINOR_OP; > - if (roc_model_is_cn9k() || roc_model_is_cn10k()) > - inst.w7.s.egrp = ROC_LEGACY_CPT_DFLT_ENG_GRP_SE; > - else > - inst.w7.s.egrp = ROC_CPT_DFLT_ENG_GRP_SE; > + > + /* SE engine group ID is same for all platform */ > + inst.w7.s.egrp = ROC_CPT_DFLT_ENG_GRP_SE; > > /* Use 1 min timeout for the poll */ > const uint64_t timeout = plt_tsc_cycles() + 60 * plt_tsc_hz(); > @@ -1614,13 +1613,7 @@ roc_nix_inl_outb_init(struct roc_nix *roc_nix) > if (!roc_nix->ipsec_out_max_sa) > goto skip_sa_alloc; > > - /* CN9K SA size is different */ > - if (roc_model_is_cn9k()) > - sa_sz = ROC_NIX_INL_ON_IPSEC_OUTB_SA_SZ; > - else if (roc_model_is_cn10k()) > - sa_sz = ROC_NIX_INL_OT_IPSEC_OUTB_SA_SZ; > - else > - sa_sz = ROC_NIX_INL_OW_IPSEC_OUTB_SA_SZ; > + sa_sz = ROC_NIX_INL_IPSEC_OUTB_SA_SZ; > > /* Alloc contiguous memory of outbound SA */ > sa_base = plt_zmalloc(sa_sz * roc_nix->ipsec_out_max_sa, > diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c > b/drivers/common/cnxk/roc_nix_inl_dev.c > index fcbe9314a1..8414b9edc6 100644 > --- a/drivers/common/cnxk/roc_nix_inl_dev.c > +++ b/drivers/common/cnxk/roc_nix_inl_dev.c > @@ -837,12 +837,8 @@ nix_inl_nix_setup(struct nix_inl_dev *inl_dev) > /* CN9K SA is different */ > if (inl_dev->custom_inb_sa) > inb_sa_sz = ROC_NIX_INL_INB_CUSTOM_SA_SZ; > - else if (roc_model_is_cn9k()) > - inb_sa_sz = ROC_NIX_INL_ON_IPSEC_INB_SA_SZ; > - else if (roc_model_is_cn10k()) > - inb_sa_sz = ROC_NIX_INL_OT_IPSEC_INB_SA_SZ; > else > - inb_sa_sz = ROC_NIX_INL_OW_IPSEC_INB_SA_SZ; > + inb_sa_sz = ROC_NIX_INL_OT_IPSEC_INB_SA_SZ; > > /* Alloc contiguous memory for Inbound SA's */ > inl_dev->inb_sa_sz[profile_id] = inb_sa_sz; > diff --git a/drivers/common/cnxk/roc_nix_inl_dp.h > b/drivers/common/cnxk/roc_nix_inl_dp.h > index eb101db179..6443770871 100644 > --- a/drivers/common/cnxk/roc_nix_inl_dp.h > +++ b/drivers/common/cnxk/roc_nix_inl_dp.h > @@ -41,6 +41,9 @@ > (ROC_NIX_INL_OW_IPSEC_OUTB_HW_SZ + ROC_NIX_INL_OW_IPSEC_OUTB_SW_RSVD) > #define ROC_NIX_INL_OW_IPSEC_OUTB_SA_SZ_LOG2 9 > > +#define ROC_NIX_INL_IPSEC_INB_SA_SZ ROC_NIX_INL_OT_IPSEC_INB_SA_SZ > +#define ROC_NIX_INL_IPSEC_OUTB_SA_SZ ROC_NIX_INL_OT_IPSEC_OUTB_SA_SZ > + > /* Alignment of SA Base */ > #define ROC_NIX_INL_SA_BASE_ALIGN BIT_ULL(16) > > diff --git a/drivers/common/cnxk/roc_nix_priv.h > b/drivers/common/cnxk/roc_nix_priv.h > index 308a62a70e..d4b3c7c1af 100644 > --- a/drivers/common/cnxk/roc_nix_priv.h > +++ b/drivers/common/cnxk/roc_nix_priv.h > @@ -23,10 +23,10 @@ > #define NIX_CQ_SEC_THRESH_LEVEL_REF1 (20 * 256 / 100) > #define NIX_CQ_BP_THRESH_LEVEL_REF1 (60 * 256 / 100) > #define NIX_CQ_SEC_BP_THRESH_LEVEL_REF1 (50 * 256 / 100) > -#define NIX_CQ_LBP_THRESH_FRAC_REF1 (80 * 16 / 100) > +#define NIX_CQ_LBP_THRESH_FRAC_REF1 (80 * 16 / 100.0) > > /* Apply LBP at 75% of actual BP */ > -#define NIX_CQ_LBP_THRESH_FRAC (75 * 16 / 100) > +#define NIX_CQ_LBP_THRESH_FRAC (75 * 16 / 100.0) > #define NIX_CQ_FULL_ERRATA_SKID (1024ull * 256) > #define NIX_RQ_AURA_BP_THRESH(percent, limit, shift) ((((limit) * (percent)) > / 100) >> (shift)) > > -- > 2.34.1 >
