When compiling with optimizations, the compiler uses AVX-512
instructions (vmovdqa64) to efficiently zero large structures.
This instruction requires 64-byte aligned memory addresses.
When compiling with ASAN, the stack layout is modified for
instrumentation, which can break the 64-byte alignment of
local structures. This causes a segfault when the misaligned
vmovdqa64 instruction executes.
Fix by adding MLX5DR_ASAN_ALIGN macro to ensure 64-byte alignment
when building with ASan.
Fixes: 338aaf911665 ("net/mlx5/hws: add send FW match STE using gen WQE")
Fixes: 12802ab2c8e2 ("net/mlx5/hws: support GTA WQE write using FW command")
Fixes: 405242c52dd5 ("net/mlx5/hws: add rule object")
Cc: [email protected]
Signed-off-by: Shani Peretz <[email protected]>
Acked-by: Bing Zhao <[email protected]>
---
drivers/net/mlx5/hws/mlx5dr_cmd.c | 4 ++--
drivers/net/mlx5/hws/mlx5dr_internal.h | 6 ++++++
drivers/net/mlx5/hws/mlx5dr_rule.c | 2 +-
drivers/net/mlx5/hws/mlx5dr_send.c | 4 ++--
4 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c
b/drivers/net/mlx5/hws/mlx5dr_cmd.c
index d6bf015d57..47e6a1fd49 100644
--- a/drivers/net/mlx5/hws/mlx5dr_cmd.c
+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c
@@ -1013,8 +1013,8 @@ int mlx5dr_cmd_generate_wqe(struct ibv_context *ctx,
struct mlx5dr_cmd_generate_wqe_attr *attr,
struct mlx5_cqe64 *ret_cqe)
{
- uint32_t out[MLX5_ST_SZ_DW(generate_wqe_out)] = {0};
- uint32_t in[MLX5_ST_SZ_DW(generate_wqe_in)] = {0};
+ MLX5DR_ASAN_ALIGN uint32_t out[MLX5_ST_SZ_DW(generate_wqe_out)] = {0};
+ MLX5DR_ASAN_ALIGN uint32_t in[MLX5_ST_SZ_DW(generate_wqe_in)] = {0};
uint8_t status;
void *ptr;
int ret;
diff --git a/drivers/net/mlx5/hws/mlx5dr_internal.h
b/drivers/net/mlx5/hws/mlx5dr_internal.h
index 2abc516b5e..6a4aafbe88 100644
--- a/drivers/net/mlx5/hws/mlx5dr_internal.h
+++ b/drivers/net/mlx5/hws/mlx5dr_internal.h
@@ -53,6 +53,12 @@
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#endif
+#ifdef RTE_MALLOC_ASAN
+#define MLX5DR_ASAN_ALIGN alignas(64)
+#else
+#define MLX5DR_ASAN_ALIGN
+#endif
+
#ifdef RTE_LIBRTE_MLX5_DEBUG
/* Prevent double function name print when debug is set */
#define DR_LOG DRV_LOG
diff --git a/drivers/net/mlx5/hws/mlx5dr_rule.c
b/drivers/net/mlx5/hws/mlx5dr_rule.c
index 895ac858ec..eb06996c90 100644
--- a/drivers/net/mlx5/hws/mlx5dr_rule.c
+++ b/drivers/net/mlx5/hws/mlx5dr_rule.c
@@ -483,7 +483,7 @@ static int mlx5dr_rule_create_hws(struct mlx5dr_rule *rule,
bool is_jumbo = mlx5dr_matcher_mt_is_jumbo(mt);
struct mlx5dr_matcher *matcher = rule->matcher;
struct mlx5dr_context *ctx = matcher->tbl->ctx;
- struct mlx5dr_send_ste_attr ste_attr = {0};
+ MLX5DR_ASAN_ALIGN struct mlx5dr_send_ste_attr ste_attr = {0};
struct mlx5dr_send_ring_dep_wqe *dep_wqe;
struct mlx5dr_actions_wqe_setter *setter;
struct mlx5dr_actions_apply_data apply;
diff --git a/drivers/net/mlx5/hws/mlx5dr_send.c
b/drivers/net/mlx5/hws/mlx5dr_send.c
index d01fc7ef2c..85f613ed39 100644
--- a/drivers/net/mlx5/hws/mlx5dr_send.c
+++ b/drivers/net/mlx5/hws/mlx5dr_send.c
@@ -250,8 +250,8 @@ int mlx5dr_send_wqe_fw(struct ibv_context *ibv_ctx,
{
bool has_range = send_wqe_range_data || send_wqe_range_tag;
bool has_match = send_wqe_match_data || send_wqe_match_tag;
- struct mlx5dr_wqe_gta_data_seg_ste gta_wqe_data0 = {0};
- struct mlx5dr_wqe_gta_data_seg_ste gta_wqe_data1 = {0};
+ MLX5DR_ASAN_ALIGN struct mlx5dr_wqe_gta_data_seg_ste gta_wqe_data0 =
{0};
+ MLX5DR_ASAN_ALIGN struct mlx5dr_wqe_gta_data_seg_ste gta_wqe_data1 =
{0};
struct mlx5dr_wqe_gta_ctrl_seg gta_wqe_ctrl = {0};
struct mlx5dr_cmd_generate_wqe_attr attr = {0};
struct mlx5dr_wqe_ctrl_seg wqe_ctrl = {0};
--
2.43.0
