Add Intel FPGA Acceleration NIC IPN3KE support for IFPGA Rawdev.
Signed-off-by: Rosen Xu <rosen...@intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zh...@intel.com>
Signed-off-by: Andy Pei <andy....@intel.com>
---
drivers/raw/ifpga_rawdev/ifpga_rawdev.c | 146 +++++++++++++++++++++++++++-
drivers/raw/ifpga_rawdev/ifpga_rawdev_api.h | 71 ++++++++++++++
2 files changed, 214 insertions(+), 3 deletions(-)
create mode 100644 drivers/raw/ifpga_rawdev/ifpga_rawdev_api.h
diff --git a/drivers/raw/ifpga_rawdev/ifpga_rawdev.c
b/drivers/raw/ifpga_rawdev/ifpga_rawdev.c
index da772d0..0635009 100644
--- a/drivers/raw/ifpga_rawdev/ifpga_rawdev.c
+++ b/drivers/raw/ifpga_rawdev/ifpga_rawdev.c
@@ -34,6 +34,7 @@
#include "ifpga_common.h"
#include "ifpga_logs.h"
#include "ifpga_rawdev.h"
+#include "ifpga_rawdev_api.h"
int ifpga_rawdev_logtype;
@@ -42,10 +43,12 @@
#define PCIE_DEVICE_ID_PF_INT_5_X 0xBCBD
#define PCIE_DEVICE_ID_PF_INT_6_X 0xBCC0
#define PCIE_DEVICE_ID_PF_DSC_1_X 0x09C4
+#define PCIE_DEVICE_ID_PAC_N3000 0x0B30
/* VF Device */
#define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF
#define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1
#define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5
+#define PCIE_DEVICE_ID_VF_PAC_N3000 0x0B31
#define RTE_MAX_RAW_DEVICE 10
static const struct rte_pci_id pci_ifpga_map[] = {
@@ -55,6 +58,8 @@
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_VF_INT_6_X) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PF_DSC_1_X) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_VF_DSC_1_X) },
+ { RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PAC_N3000),},
+ { RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_VF_PAC_N3000),},
{ .vendor_id = 0, /* sentinel */ },
};
@@ -327,6 +332,141 @@
return 0;
}
+static int
+ifgpa_rawdev_get_attr(struct rte_rawdev *dev,
+ const char *attr_name,
+ uint64_t *attr_value)
+{
+ struct ifpga_rawdev_mac_info *mac_info;
+ struct ifpga_rawdevg_retimer_info *retimer_info;
+ struct opae_retimer_info or_info;
+ struct opae_adapter *adapter;
+ struct opae_manager *mgr;
+ struct ifpga_rawdevg_link_info *linfo;
+ struct opae_retimer_status rstatus;
+
+ IFPGA_RAWDEV_PMD_FUNC_TRACE();
+
+ if (!dev || !attr_name || !attr_value) {
+ IFPGA_BUS_ERR("Invalid arguments for getting attributes");
+ return -1;
+ }
+
+ adapter = ifpga_rawdev_get_priv(dev);
+ if (!adapter)
+ return -1;
+
+ mgr = opae_adapter_get_mgr(adapter);
+ if (!mgr)
+ return -1;
+
+ if (!strcmp(attr_name, "retimer_info")) {
+ retimer_info = (struct ifpga_rawdevg_retimer_info *)attr_value;
+ if (opae_manager_get_retimer_info(mgr, &or_info))
+ return -1;
+
+ retimer_info->retimer_num = or_info.num_retimer;
+ retimer_info->port_num = or_info.num_port;
+ switch (or_info.support_speed) {
+ case MXD_10GB:
+ retimer_info->mac_type =
+ IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI;
+ break;
+ case MXD_25GB:
+ retimer_info->mac_type =
+ IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI;
+ break;
+ case MXD_40GB:
+ retimer_info->mac_type =
+ IFPGA_RAWDEVG_RETIMER_MAC_TYPE_40GE_XLAUI;
+ break;
+ case MXD_100GB:
+ retimer_info->mac_type =
+ IFPGA_RAWDEV_RETIMER_MAC_TYPE_100GE_CAUI;
+ break;
+ default:
+ retimer_info->mac_type =
+ IFPGA_RAWDEV_RETIMER_MAC_TYPE_UNKNOWN;
+ break;
+ }
+ return 0;
+ } else if (!strcmp(attr_name, "default_mac")) {
+ /* not implement by MAX */
+ mac_info = (struct ifpga_rawdev_mac_info *)attr_value;
+ mac_info->addr.addr_bytes[0] = 0;
+ mac_info->addr.addr_bytes[1] = 0;
+ mac_info->addr.addr_bytes[2] = 0;
+ mac_info->addr.addr_bytes[3] = 0;
+ mac_info->addr.addr_bytes[4] = 0;
+ mac_info->addr.addr_bytes[5] = 0xA + mac_info->port_id;
+
+ return 0;
+ } else if (!strcmp(attr_name, "retimer_linkstatus")) {
+ linfo = (struct ifpga_rawdevg_link_info *)attr_value;
+ linfo->link_up = 0;
+ linfo->link_speed = IFPGA_RAWDEV_LINK_SPEED_UNKNOWN;
+
+ if (opae_manager_get_retimer_status(mgr, linfo->port, &rstatus))
+ return -1;
+
+ linfo->link_up = rstatus.line_link;
+ switch (rstatus.speed) {
+ case MXD_10GB:
+ linfo->link_speed =
+ IFPGA_RAWDEV_LINK_SPEED_10GB;
+ break;
+ case MXD_25GB:
+ linfo->link_speed =
+ IFPGA_RAWDEV_LINK_SPEED_25GB;
+ break;
+ case MXD_40GB:
+ linfo->link_speed =
+ IFPGA_RAWDEV_LINK_SPEED_40GB;
+ break;
+ default:
+ linfo->link_speed =
+ IFPGA_RAWDEV_LINK_SPEED_UNKNOWN;
+ break;
+ }
+
+ return 0;
+ } else
+ return -1;
+
+ /* Attribute not found */
+ return -1;
+}
+
+static int ifgpa_rawdev_set_attr(struct rte_rawdev *dev,
+ const char *attr_name,
+ const uint64_t attr_value)
+{
+ struct opae_adapter *adapter;
+ struct opae_manager *mgr;
+ /*struct ifpga_rawdevg_link_info *linfo;*/
+ /*struct opae_retimer_status rstatus;*/
+
+ IFPGA_RAWDEV_PMD_FUNC_TRACE();
+
+ if (!dev || !attr_name) {
+ IFPGA_BUS_ERR("Invalid arguments for setting attributes");
+ return -1;
+ }
+
+ adapter = ifpga_rawdev_get_priv(dev);
+ if (!adapter)
+ return -1;
+
+ mgr = opae_adapter_get_mgr(adapter);
+ if (!mgr)
+ return -1;
+
+ if (!strcmp(attr_name, "retimer_linkstatus"))
+ printf("ifgpa_rawdev_set_attr_func %lx\n", attr_value);
+
+ return -1;
+}
+
static const struct rte_rawdev_ops ifpga_rawdev_ops = {
.dev_info_get = ifpga_rawdev_info_get,
.dev_configure = ifpga_rawdev_configure,
@@ -339,8 +479,8 @@
.queue_setup = NULL,
.queue_release = NULL,
- .attr_get = NULL,
- .attr_set = NULL,
+ .attr_get = ifgpa_rawdev_get_attr,
+ .attr_set = ifgpa_rawdev_set_attr,
.enqueue_bufs = NULL,
.dequeue_bufs = NULL,
@@ -419,7 +559,7 @@
rawdev->dev_ops = &ifpga_rawdev_ops;
rawdev->device = &pci_dev->device;
- rawdev->driver_name = pci_dev->device.driver->name;
+ rawdev->driver_name = pci_dev->driver->driver.name;
/* must enumerate the adapter before use it */
ret = opae_adapter_enumerate(adapter);
diff --git a/drivers/raw/ifpga_rawdev/ifpga_rawdev_api.h
b/drivers/raw/ifpga_rawdev/ifpga_rawdev_api.h
new file mode 100644
index 0000000..31e0000
--- /dev/null
+++ b/drivers/raw/ifpga_rawdev/ifpga_rawdev_api.h
@@ -0,0 +1,71 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2010-2018 Intel Corporation
+ */
+
+#ifndef _IFPGA_RAWDEV_API_H_
+#define _IFPGA_RAWDEV_API_H_
+
+#include <rte_ether.h>
+
+#ifndef ETH_ALEN
+#define ETH_ALEN 6
+#endif
+
+struct ifpga_rawdev_mac_info {
+ uint16_t port_id;
+ struct ether_addr addr;
+};
+
+enum ifpga_rawdev_retimer_media_type {
+ IFPGA_RAWDEV_RETIMER_MEDIA_TYPE_UNKNOWN = 0,
+ IFPGA_RAWDEV_RETIMER_MEDIA_TYPE_100GBASE_LR4,
+ IFPGA_RAWDEV_RETIMER_MEDIA_TYPE_100GBASE_SR4,
+ IFPGA_RAWDEV_RETIMER_MEDIA_TYPE_100GBASE_CR4,
+ IFPGA_RAWDEV_RETIMER_MEDIA_TYPE_40GBASE_LR4,
+ IFPGA_RAWDEV_RETIMER_MEDIA_TYPE_400GBASE_SR4,
+ IFPGA_RAWDEV_RETIMER_MEDIA_TYPE_40GBASE_CR4,
+ IFPGA_RAWDEV_RETIMER_MEDIA_TYPE_25GBASE_SR,
+ IFPGA_RAWDEV_RETIMER_MEDIA_TYPE_25GBASE_CR,
+ IFPGA_RAWDEV_RETIMER_MEDIA_TYPE_10GBASE_LR,
+ IFPGA_RAWDEV_RETIMER_MEDIA_TYPE_10GBASE_SR,
+ IFPGA_RAWDEV_RETIMER_MEDIA_TYPE_10GBASE_DAC,
+ IFPGA_RAWDEV_RETIMER_MEDIA_TYPE_DEFAULT
+};
+
+enum ifpga_rawdev_retimer_mac_type {
+ IFPGA_RAWDEV_RETIMER_MAC_TYPE_UNKNOWN = 0,
+ IFPGA_RAWDEV_RETIMER_MAC_TYPE_100GE_CAUI,
+ IFPGA_RAWDEVG_RETIMER_MAC_TYPE_40GE_XLAUI,
+ IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI,
+ IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI,
+ IFPGA_RAWDEV_RETIMER_MAC_TYPE_DEFAULT
+};
+
+#define IFPGA_RAWDEV_LINK_SPEED_10GB_SHIFT 0x0
+#define IFPGA_RAWDEV_LINK_SPEED_40GB_SHIFT 0x1
+#define IFPGA_RAWDEV_LINK_SPEED_25GB_SHIFT 0x2
+
+enum ifpga_rawdev_link_speed {
+ IFPGA_RAWDEV_LINK_SPEED_UNKNOWN = 0,
+ IFPGA_RAWDEV_LINK_SPEED_10GB =
+ (1 << IFPGA_RAWDEV_LINK_SPEED_10GB_SHIFT),
+ IFPGA_RAWDEV_LINK_SPEED_40GB =
+ (1 << IFPGA_RAWDEV_LINK_SPEED_40GB_SHIFT),
+ IFPGA_RAWDEV_LINK_SPEED_25GB =
+ (1 << IFPGA_RAWDEV_LINK_SPEED_25GB_SHIFT),
+};
+
+struct ifpga_rawdevg_retimer_info {
+ int retimer_num;
+ int port_num;
+ enum ifpga_rawdev_retimer_media_type media_type;
+ enum ifpga_rawdev_retimer_mac_type mac_type;
+};
+
+struct ifpga_rawdevg_link_info {
+ int port;
+ int link_up;
+ enum ifpga_rawdev_link_speed link_speed;
+};
+
+#endif /* _IFPGA_RAWDEV_H_ */
--
1.8.3.1
