On Tue, 2013-02-05 at 23:51 +0100, Kai Engert wrote: > On Mon, 2013-02-04 at 11:18 -0800, Wan-Teh Chang wrote: > > * NSS will now make use of the Intel AES-NI and AVX instruction sets > > for hardware-accelerated AES-GCM on 64-bit Linux systems. > > Because it turns out to be an FAQ: > > On Linux, because of this change, we require at least GNU "as" version > 2.19 or newer. > > It's known that NSS 3.14.2 fails to build on Intel based RHEL 5.x > systems. However, you could install the binutils220 package, and in your > build environment, make sure that the first entry in the PATH > environment variable points to /usr/libexec/binutils220
FYI, the above is related to build failures such as: intel-gcm.s: Assembler messages: intel-gcm.s:39: Error: no such instruction: `vmovdqu (Tp),T' intel-gcm.s:40: Error: no such instruction: `vpshufb .Lbswap_mask(% rip),T,T' intel-gcm.s:41: Error: no such instruction: `vpxor TMP0,TMP0,TMP0' intel-gcm.s:44: Error: no such instruction: `vpinsrq $0,Mlen,TMP0,TMP0' intel-gcm.s:45: Error: no such instruction: `vpinsrq $1,Alen,TMP0,TMP0' intel-gcm.s:46: Error: no such instruction: `vpxor TMP0,T,T' intel-gcm.s:47: Error: no such instruction: `vmovdqu (Htbl),TMP0' intel-gcm.s:49: Error: no such instruction: `vpshufb .Lbswap_mask(% rip),T,T' intel-gcm.s:50: Error: no such instruction: `vpxor (X0),T,T' intel-gcm.s:51: Error: no such instruction: `vmovdqu T,(TAG)' intel-gcm.s:71: Error: no such instruction: `vmovdqu 16*0(KS),T' intel-gcm.s:72: Error: no such instruction: `vaesenc 16*1(KS),T,T' (Adding this detail, to help people find this info after running into the build failure, and searching for these errors.) Kai -- dev-tech-crypto mailing list dev-tech-crypto@lists.mozilla.org https://lists.mozilla.org/listinfo/dev-tech-crypto
