On Sat, 2016-05-07 at 13:45 +0100, Steven Chamberlain wrote: > Hi, > > Ben Hutchings wrote: > > > > Last year it was decided to increase the minimum CPU features for the > > i386 architecture to 686-class in the stretch release cycle. This > > means dropping support for 586-class and hybrid 586/686 > > processors[1].(Support for 486-class processors was dropped, somewhat > > accidentally, in squeeze.) > Is it possible that some 586-class processors support all the necessary > instructions to still run this kernel and/or userland? > > I seem to remember last time this was discussed, GNU `as' avoids using a > particular 686-class instruction
We're following the definition of 686-class that is implemented by gcc
and the kernel. This apparently differs in two ways from Intel's
original definition of 686-class (though I don't know where that is):
1. Intel specified NOPL (long NOP) as a required feature, but we don't
use it.
2. Intel specified CMOV as an optional feature, but we *do* use it.
I hoped that giving a list of the affected processors would clarify
this.
> To give an example, this Geode MX is not quite 686-class but has CMOV:
>
> >
> > cpu0: Geode(TM) IntegraTed Processor by National Semi ("Geode by NSC"
> > 586-class) 333 MHz
> > cpu0: FPU,DE,PSE,TSC,MSR,CX8,PGE,CMOV,MMX,MMXX,3DNOW2,3DNOW
That should still be supported.
Ben.
--
Ben Hutchings
Editing code like this is akin to sticking plasters on the bleeding stump
of a severed limb. - me, 29 June 1999
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