On Wed, 2014-12-17 13:11:32 +0000, Jurica Stanojkovic wrote: > Package: tbb > Version: 4.2~20140122-4 > Severity: serious > Tags: sid + patch > Justification: FTBFS > User: debian-m...@lists.debian.org > Usertags: mips-patch > > Hello, > Package tbb_4.2~20140122-4 FTBFS on mips and mipsel. > > Mips platform does not have 64-bit __sync_* operations. > To resolve this issue it is needed to use corresponding > __atomic_* from libatomic library. > > https://buildd.debian.org/status/package.php?p=tbb&suite=sid > > build logs: > https://buildd.debian.org/status/fetch.php?pkg=tbb&arch=mips&ver=4.2~20140122-4&stamp=1415055684 > https://buildd.debian.org/status/fetch.php?pkg=tbb&arch=mipsel&ver=4.2~20140122-4&stamp=1415054347 > > I have attached a patch resolving this issue. > > Thank you! > > Regards, > Jurica
Hello Steven,
At IMGtech.com, we would like to support this patch for tbb.
If you prefer, I could sponsor a new Debian version of tbb including
Jurica's patch.
Regards,
Aníbal
--
Anibal Monsalve Salazar <anibal.monsalvesala...@imgtec.com>
> --- tbb-4.2~20140122.orig/build/linux.gcc.inc
> +++ tbb-4.2~20140122/build/linux.gcc.inc
> @@ -80,6 +80,14 @@ endif
> TBB_ASM.OBJ=
> MALLOC_ASM.OBJ=
>
> +ifeq (mips,$(arch))
> + LINK_FLAGS += -latomic
> +endif
> +
> +ifeq (mipsel,$(arch))
> + LINK_FLAGS += -latomic
> +endif
> +
> ifeq (ia64,$(arch))
> # Position-independent code (PIC) is a must on IA-64 architecture, even for
> regular (not shared) executables
> CPLUS_FLAGS += $(PIC_KEY)
> --- tbb-4.2~20140122.orig/build/linux.inc
> +++ tbb-4.2~20140122/build/linux.inc
> @@ -76,6 +76,12 @@ ifndef arch
> ifeq ($(deb_host_arch),i386)
> export arch:=ia32
> endif
> + ifeq ($(deb_host_arch),mips)
> + export arch:=mips
> + endif
> + ifeq ($(deb_host_arch),mipsel)
> + export arch:=mipsel
> + endif
> ifndef arch
> export arch:=$(uname_m)
> $(warning "Unknown arch: " $(arch))
> --- tbb-4.2~20140122.orig/include/tbb/machine/gcc_generic.h
> +++ tbb-4.2~20140122/include/tbb/machine/gcc_generic.h
> @@ -68,14 +68,27 @@
> #define __TBB_full_memory_fence() __sync_synchronize()
> #define __TBB_control_consistency_helper() __sync_synchronize()
>
> -#define __TBB_MACHINE_DEFINE_ATOMICS(S,T)
> \
> -inline T __TBB_machine_cmpswp##S( volatile void *ptr, T value, T comparand )
> { \
> - return __sync_val_compare_and_swap(reinterpret_cast<volatile T
> *>(ptr),comparand,value); \
> -}
> \
> -
> \
> -inline T __TBB_machine_fetchadd##S( volatile void *ptr, T value ) {
> \
> - return __sync_fetch_and_add(reinterpret_cast<volatile T *>(ptr),value);
> \
> -}
> \
> +#if defined (__mips) && !defined (__mips64)
> + #define __TBB_MACHINE_DEFINE_ATOMICS(S,T)
> \
> + inline T __TBB_machine_cmpswp##S( volatile void *ptr, T value, T
> comparand ) { \
> + __atomic_compare_exchange(reinterpret_cast<volatile T
> *>(ptr),&comparand,&value, \
> + false,__ATOMIC_SEQ_CST,__ATOMIC_SEQ_CST);
> \
> + return comparand;
> \
> + }
> \
> +
> \
> + inline T __TBB_machine_fetchadd##S( volatile void *ptr, T value ) {
> \
> + return __atomic_fetch_add(reinterpret_cast<volatile T
> *>(ptr),value,__ATOMIC_SEQ_CST); \
> + }
> +#else
> + #define __TBB_MACHINE_DEFINE_ATOMICS(S,T)
> \
> + inline T __TBB_machine_cmpswp##S( volatile void *ptr, T value, T
> comparand ) { \
> + return __sync_val_compare_and_swap(reinterpret_cast<volatile T
> *>(ptr),comparand,value); \
> + }
> \
> +
> \
> + inline T __TBB_machine_fetchadd##S( volatile void *ptr, T value ) {
> \
> + return __sync_fetch_and_add(reinterpret_cast<volatile T
> *>(ptr),value); \
> + }
> +#endif
>
> __TBB_MACHINE_DEFINE_ATOMICS(1,int8_t)
> __TBB_MACHINE_DEFINE_ATOMICS(2,int16_t)
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