Package: binutils-arm-linux-gnueabi
Version: 2.20.1-16
Severity: minor
The ARM (cross) assembler arm-linux-gnueabi-as issues the
"-mimplicit-it=mode" warning/error incorrectly in a number of
cases:
1. In ARM code, when thumb-portability warnings about
recommended use of IT are enabled with "-mimplicit-it=never"
or "-mimplicit-it=thumb", the warning that thumb-portable
code should use an IT instruction is also issued for
conditional branches, which normally do not use the IT prefix
instruction in thumb mode (when assembling the same code in
THUMB mode, the unprefixed conditional branch is recognized
and assembled without warning as expected).
2. If the selected ARM architecture version does not support the
IT instruction at all, warnings(ARM)/errors(THUMB) are still
issued telling the user to use the IT instruction, while no
warning is issued not to use it. This would confuse users
who do not know this is impossible.
Further below is a sample source file which demonstrates various
cases where the IT related warning/error should or should not be
issued, but first the output from passing the test file to gas.
(NOTE: I /have/ tested that a variant of the source file without
errors still generates the same incorrect warnings).
Actual input/output:
$ arm-linux-gnueabi-as -mimplicit-it=never arm-it-warning-demo.s
arm-it-warning-demo.s: Assembler messages:
arm-it-warning-demo.s:21: Error: thumb conditional instruction should be in IT
block -- `moveq r0,r1'
arm-it-warning-demo.s:48: Error: selected processor does not support `it EQ'
arm-it-warning-demo.s:49: Error: thumb conditional instruction should be in IT
block -- `moveq r0,r1'
arm-it-warning-demo.s:60: Error: thumb conditional instruction should be in IT
block -- `moveq r0,r1'
arm-it-warning-demo.s:85: Warning: conditional outside an IT block for Thumb.
arm-it-warning-demo.s:100: Warning: conditional outside an IT block for Thumb.
arm-it-warning-demo.s:118: Warning: conditional outside an IT block for Thumb.
arm-it-warning-demo.s:124: Warning: conditional outside an IT block for Thumb.
$ arm-linux-gnueabi-as -mimplicit-it=always arm-it-warning-demo.s
arm-it-warning-demo.s: Assembler messages:
arm-it-warning-demo.s:48: Error: selected processor does not support `it EQ'
arm-it-warning-demo.s:49: Error: thumb conditional instruction should be in IT
block -- `moveq r0,r1'
arm-it-warning-demo.s:60: Error: thumb conditional instruction should be in IT
block -- `moveq r0,r1'
Expected input/output:
$ arm-linux-gnueabi-as -mimplicit-it=never arm-it-warning-demo.s
arm-it-warning-demo.s: Assembler messages:
arm-it-warning-demo.s:21: Error: thumb conditional instruction should be in IT
block -- `moveq r0,r1'
arm-it-warning-demo.s:48: Error: selected processor does not support `it EQ'
arm-it-warning-demo.s:49: Error: selected processor does not support -- `moveq
r0,r1'
arm-it-warning-demo.s:60: Error: selected processor does not support -- `moveq
r0,r1'
arm-it-warning-demo.s:85: Warning: conditional outside an IT block for Thumb.
arm-it-warning-demo.s:110: Warning: selected processor does not support `it EQ'
for Thumb
$ arm-linux-gnueabi-as -mimplicit-it=always arm-it-warning-demo.s
arm-it-warning-demo.s: Assembler messages:
arm-it-warning-demo.s:48: Error: selected processor does not support `it EQ'
arm-it-warning-demo.s:49: Error: selected processor does not support `moveq
r0,r1'
arm-it-warning-demo.s:60: Error: selected processor does not support `moveq
r0,r1'
And here is the contents of the test file arm-it-warning-demoe.s
(tabs are used before instructions/directives and between
instruction/directive and operands):
FILE BEGIN
# Demo of bad IT warning in gas for thumb conditional branches
# For TEST RUN 1, invoke "as -mimplicit-it=never arm-it-warning-demo.s"
# For TEST RUN 2, invoke "as -mimplicit-it=always arm-it-warning-demo.s"
.syntax unified
.code 16
.arch armv7
foo_thumb:
NOP
MOV r2,#1
MOVS r3,r2
CMP r3,r2
# This SHOULD give an error in test run 1 and succeed in test run 2
# (or you are using the wrong as options), Thumb cannot do
# this without an enclosing IT instruction
# THIS TEST PASSES: Error is issued and assembling fails, in run 1
# only
MOVEQ r0,r1
NOP
# This should NOT give any warning or error because IT is used
# correctly
# THIS TEST PASSES
IT EQ
MOVEQ r0,r1
NOP
# This should NOT give the warning because branches don't use IT
# THIS TEST PASSES
BNE 1f
MOV r0,r1
1:
NOP
.arch armv6
# This should not even assemble because ARMv6 has no IT
# THIS TEST FAILS PARTIALLY: After the correct error that
# "selected processor does not support `it EQ'"
# follows another error on the next line
# "thumb conditional instruction should be in IT block"
# which should have been
# "selected processor does not support `moveq r0,r1'"
IT EQ
MOVEQ r0,r1
NOP
# This should not even assemble because ARMv6T has no conditional
# MOV
# THIS TEST FAILS PARTIALLY: Assembling fails correctly, but error
# message is
# "thumb conditional instruction should be in IT block"
# which should have been
# "selected processor does not support `moveq r0,r1'"
MOVEQ r0,r1
NOP
# This should still assemble without warning and work just fine
# THIS TEST PASSES
BNE 2f
MOV r0,r1
2:
NOP
.code 32
.arch armv7-a
foo_arm:
NOP
MOV r2,#1
MOVS r3,r2
CMP r3,r2
# This SHOULD give the warning in run 1 (or your are using the wrong
# as options)
# THIS TEST PASSES: Warning to use IT for portability to Thumb is
# issued in run 1 and not in run 2
MOVEQ r0,r1
NOP
# This should NOT give the warning because IT is used correctly
# Code should be exactly as above
# THIS TEST PASSES
IT EQ
MOVEQ r0,r1
NOP
# This should NOT give the warning because branches don't use IT
# in thumb mode
# THIS TEST FAILS: Warning is issued incorrectly in run 1
BNE 1f
MOV r0,r1
1:
NOP
.arch armv6
# This should not even assemble because ARMv6 has no IT
# THIS TEST FAILS: No warning is issued that IT is not supported
# by ARMv6's Thumb mode, even though the IT instruction IS
# ignored.
IT EQ
MOVEQ r0,r1
NOP
# This should not give a warning because MOVEQ is valid in ARM mode
# and using IT is not allowed on ARMv6
# THIS TEST FAILS! Warning is issued incorrectly in run 1
MOVEQ r0,r1
NOP
# This should still assemble without warning and work just fine
# THIS TEST FAILS! Warning is issued incorrectly in run 1
BNE 2f
MOV r0,r1
2:
NOP
FILE END
Permission is hereby granted to distribute the above sample file
under any version of the GNU GPL, LGPL and GFDL licenses also
used for distribution of any version of gas and/or its
documentation. If the standard GNU preamble is added to the
sample, we would prefer (but do not require), that the "version
1 or later" (2 or later for LGPL) form is used rather than the
more restrictive "<latest version by GNU> or later" language.
WE DISCLAIM ALL RESPONSIBILITY FOR THESES FILES AND MATERIALS.
FOR A MORE DETAILED DISCLAIMER, PLEASE REFER TO THE TEXT OF THE
GNU LICENSES MENTIONED ABOVE.
UPPER case in this report is used for relevant acronyms, for
assembler mnemonics and for emphasis when skimming the text,
it is not intended to imply shouting.
-- System Information:
Debian Release: 6.0.2
APT prefers stable-updates
APT policy: (500, 'stable-updates'), (500, 'stable')
Architecture: amd64 (x86_64)
Kernel: Linux 2.6.39-bpo.2-amd64 (SMP w/1 CPU core)
Locale: LANG=en_DK.UTF-8, LC_CTYPE=en_DK.UTF-8 (charmap=UTF-8)
Shell: /bin/sh linked to /bin/dash
Versions of packages binutils-arm-linux-gnueabi depends on:
ii binutils 2.20.1-16 The GNU assembler, linker and bina
ii libc6 2.11.2-10 Embedded GNU C Library: Shared lib
ii zlib1g 1:1.2.3.4.dfsg-3 compression library - runtime
binutils-arm-linux-gnueabi recommends no packages.
Versions of packages binutils-arm-linux-gnueabi suggests:
ii binutils-doc 2.20.1-16 Documentation for the GNU assemble
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