Hi Jeff, I updated Thiemo's patch against the OMPI trunk. I came to see that a large portion of the former patch already exists in Open MPI. It was introduced by George with commit r20154. Therefore, the patch is a little smaller than the previuos version. The commmit message reads like there was a successful compilation on a MIPS machine. I do not know if the patch is "invasive"; maybe we should include George in the process?! (I do not have his email at hand.)
It seems like OMPI does not build on Debian's MIPS boxes. Maybe the changes in the patch are all that are needed; I do have to confess that I do not understand all of them and simply trusted Thiemo. The issue with libtool is solved on my system with libtool 2.2.6. Best regards Manuel P.S.: Please keep the bug number email address in CC, so we can keep the process visible in our bug tracker. Emails to this address will also go to our mailing list.
Index: opal/asm/asm-data.txt
===================================================================
--- opal/asm/asm-data.txt (Revision 20331)
+++ opal/asm/asm-data.txt (Arbeitskopie)
@@ -127,3 +127,7 @@
MIPS default-.text-.globl-:--L--1-1-1-1-0 mips-irix
MIPS default-.text-.globl-:--L--1-1-1-1-0 mips64el
+MIPS default-.text-.globl-:-...@-1-1-1-1-1 mips64-linux
+
+# However, this doesn't hold true for 32-bit MIPS as used on Linux.
+MIPS default-.text-.globl-:-...@-1-1-1-0-1 mips-linux
Index: opal/asm/base/MIPS.asm
===================================================================
--- opal/asm/base/MIPS.asm (Revision 20331)
+++ opal/asm/base/MIPS.asm (Arbeitskopie)
@@ -1,26 +1,48 @@
START_FILE
+#ifdef __linux__
#include <sys/asm.h>
+#else
+#include <asm.h>
+#endif
#include <regdef.h>
TEXT
ALIGN(8)
LEAF(opal_atomic_mb)
+#ifdef __linux__
+ .set mips2
+#endif
sync
+#ifdef __linux__
+ .set mips0
+#endif
j ra
END(opal_atomic_mb)
ALIGN(8)
LEAF(opal_atomic_rmb)
+#ifdef __linux__
+ .set mips2
+#endif
sync
+#ifdef __linux__
+ .set mips0
+#endif
j ra
END(opal_atomic_rmb)
LEAF(opal_atomic_wmb)
+#ifdef __linux__
+ .set mips2
+#endif
sync
+#ifdef __linux__
+ .set mips0
+#endif
j ra
END(opal_atomic_wmb)
@@ -28,7 +50,13 @@
LEAF(opal_atomic_cmpset_32)
.set noreorder
retry1:
+#ifdef __linux__
+ .set mips2
+#endif
ll $3, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
bne $3, $5, done1
or $2, $6, 0
sc $2, 0($4)
@@ -45,13 +73,31 @@
LEAF(opal_atomic_cmpset_acq_32)
.set noreorder
retry2:
+#ifdef __linux__
+ .set mips2
+#endif
ll $3, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
bne $3, $5, done2
or $2, $6, 0
+#ifdef __linux__
+ .set mips2
+#endif
sc $2, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
beqz $2, retry2
done2:
+#ifdef __linux__
+ .set mips2
+#endif
sync
+#ifdef __linux__
+ .set mips0
+#endif
.set reorder
xor $3,$3,$5
@@ -62,12 +108,30 @@
LEAF(opal_atomic_cmpset_rel_32)
.set noreorder
+#ifdef __linux__
+ .set mips2
+#endif
sync
+#ifdef __linux__
+ .set mips0
+#endif
retry3:
+#ifdef __linux__
+ .set mips2
+#endif
ll $3, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
bne $3, $5, done3
or $2, $6, 0
+#ifdef __linux__
+ .set mips2
+#endif
sc $2, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
beqz $2, retry3
done3:
.set reorder
@@ -77,7 +141,7 @@
sltu $2,$3,1
END(opal_atomic_cmpset_rel_32)
-
+#ifdef __mips64
LEAF(opal_atomic_cmpset_64)
.set noreorder
retry4:
@@ -128,3 +192,4 @@
j ra
sltu $3,$4,1
END(opal_atomic_cmpset_rel_64)
+#endif /* __mips64 */
Index: opal/include/opal/sys/mips/atomic.h
===================================================================
--- opal/include/opal/sys/mips/atomic.h (Revision 20331)
+++ opal/include/opal/sys/mips/atomic.h (Arbeitskopie)
@@ -23,10 +23,17 @@
#if OMPI_WANT_SMP_LOCKS
/* BWB - FIX ME! */
+#ifdef __linux__
+#define MB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory")
+#define RMB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory")
+#define WMB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory")
+#define SMP_SYNC ".set mips2; sync; .set mips0"
+#else
#define MB() __asm__ __volatile__("sync": : :"memory")
#define RMB() __asm__ __volatile__("sync": : :"memory")
#define WMB() __asm__ __volatile__("sync": : :"memory")
#define SMP_SYNC "sync"
+#endif
#else
@@ -46,9 +53,11 @@
#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
#define OPAL_HAVE_ATOMIC_CMPSET_32 1
+
+#ifdef __mips64
#define OPAL_HAVE_ATOMIC_CMPSET_64 1
+#endif
-
/**********************************************************************
*
* Memory Barriers
@@ -93,10 +102,16 @@
__asm__ __volatile__ (".set noreorder \n"
".set noat \n"
"1: \n"
+#ifdef __linux__
+ ".set mips2 \n\t"
+#endif
"ll %0, %2 \n" /* load *addr into ret */
"bne %0, %z3, 2f \n" /* done if oldval != ret */
"or $1, %z4, 0 \n" /* tmp = newval (delay slot) */
"sc $1, %2 \n" /* store tmp in *addr */
+#ifdef __linux__
+ ".set mips0 \n\t"
+#endif
/* note: ret will be 0 if failed, 1 if succeeded */
"beqz $1, 1b \n" /* if 0 jump back to 1b */
"nop \n" /* fill delay slots */
@@ -133,7 +148,7 @@
return opal_atomic_cmpset_32(addr, oldval, newval);
}
-
+#ifdef OPAL_HAVE_ATOMIC_CMPSET_64
static inline int opal_atomic_cmpset_64(volatile int64_t *addr,
int64_t oldval, int64_t newval)
{
@@ -182,6 +197,7 @@
opal_atomic_wmb();
return opal_atomic_cmpset_64(addr, oldval, newval);
}
+#endif /* OPAL_HAVE_ATOMIC_CMPSET_64 */
#endif /* OMPI_GCC_INLINE_ASSEMBLY */
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