On Thu, Apr 10, 2008 at 09:28:24AM +0200, Sven Luther wrote: > What about non-x86 architectures, well i guess ia64 and > powerpc/powerpc64 are the most interesting candidates.
It should be zero cost there too if it has been implemented correctly. The only feature that initially generated a minimum overhead to the scheduler was present on x86 (the TIF_NOTSC removed that overhead from the fast path completely). This is because disabling the tsc was mostly an issue for Intel hyperthreading and not for anything else so all other archs should have seccomp implementations that have always been zero cost like in x86-64. -- To UNSUBSCRIBE, email to [EMAIL PROTECTED] with a subject of "unsubscribe". Trouble? Contact [EMAIL PROTECTED]
