retitle 418036 qemu: incorrectly allows segment registers to be too priviledged. thanks
I had some trouble debugging my OS, but this one was indeed caught by qemu. The one that wasn't is when a pl0 process returns to a pl3 process (using iret) with its segment registers (except ss) still set to pl0-only data segments. This should break with a general protection fault at the first reference of any data using them, if I understand the docs correctly. At least real hardware will hang (without a proper gp handler), I didn't investigate exactly when. -- I encourage people to send encrypted e-mail (see http://www.gnupg.org). If you have problems reading my e-mail, use a better reader. Please send the central message of e-mails as plain text in the message body, not as HTML and definitely not as MS Word. Please do not use the MS Word format for attachments either. For more information, see http://pcbcn10.phys.rug.nl/e-mail.html
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