Source: llvm-toolchain-22 Version: 1:22.1.2-1ubuntu1 Severity: important Dear Maintainer,
clang-22 (Debian package `1:22.1.8-1+b1`, upstream `llvmorg-22.1.8`) fatally aborts on any HIP or LLVM IR translation unit that contains an `amdgpu_kernel` whose CFG includes a block ending in `llvm.trap()` with no successors, when targeting **gfx1100, gfx1101, or gfx1102** (RDNA3 desktop: RX 7900, RX 7800, RX 7700, RX 7600): ``` fatal error: error in backend: Unsupported instruction : <MCInst 4399 <MCOperand Reg:7675> <MCOperand Reg:7679> <MCOperand Reg:7675>> clang++: error: clang frontend command failed with exit code 70 ``` The trigger is common enough to make real packages FTBFS. In particular, `pytorch-rocm` 2.12 (built from `src:pytorch`) hits this on `aten/src/ATen/native/hip/Loss.hip` (NLL loss backward) for every ROCm 7.2 build on gfx110x; the pytorch packaging currently ships a `debian/rules` workaround that filters gfx1100/gfx1101/gfx1102 out of `PYTORCH_ROCM_ARCH`, so those RDNA3 desktop cards get no accelerated PyTorch in Debian. ## Root cause `SIInstrInfo::insertSimulatedTrap` returns `HaltLoopBB` when the trap sits in a block with no successors and is the last instruction. Since `HaltLoopBB` is appended to the end of the function, `FinalizeISel` jumps there and skips any intermediate blocks, **leaving their pseudos unexpanded**. Those unexpanded pseudos reach the MC layer, which has no encoding for pseudo opcodes — hence "Unsupported instruction : <MCInst NNNN ...>". Full details, minimal reproducer, and arch matrix in the upstream issue: https://github.com/llvm/llvm-project/issues/208912 ## Fix Upstream commit `9429a1e809fdf05e1eef1350f27569ae53ccd721` (https://github.com/llvm/llvm-project/pull/174774) — *"[AMDGPU] Fix insertSimulatedTrap to return correct continuation block"*. Merged to `main` on 2026-01-21. `release/22.x` was cut from `main` at merge-base `e9f758a59b2f` (2026-01-13), **eight days before this fix landed**, and no subsequent 22.x point release has picked it up. The fix will first appear in an upstream LLVM 23 release. The patch is small (10 lines in `llvm/lib/Target/AMDGPU/SIInstrInfo.cpp`; upstream also adds a 56-line MIR test) and self-contained — no dependent commits, no API changes. ## Reproducer ```llvm target triple = "amdgcn-amd-amdhsa" declare void @llvm.trap() #0 define amdgpu_kernel void @kern(i64 %0, i1 %1, ptr %2) { br i1 %1, label %5, label %4 4: call void @llvm.trap() unreachable 5: %6 = getelementptr double, ptr %2, i64 %0 store double 0.000000e+00, ptr %6, align 8 ret void } attributes #0 = { cold noreturn nounwind memory(inaccessiblemem: write) } ``` Save as `reduced.ll`, then: ``` llc-22 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1102 -O3 -filetype=obj reduced.ll -o /tmp/out.o ``` - Without the fix (current `1:22.1.8-1+b1`): fatal error, exit 134. - With the fix (patched 22.1.8, or clang-23 nightly from apt.llvm.org): exits 0, produces a valid `.o`. Same arch matrix: only gfx1100, gfx1101, gfx1102 fail. All other AMDGPU targets (gfx803, gfx900, gfx906, gfx908, gfx90a, gfx942, gfx1010, gfx1030, gfx1151, gfx1200, gfx1201) build cleanly with and without the fix. ## Verification I have cherry-picked the upstream commit onto `1:22.1.8-1` as a quilt patch, rebuilt `llvm-toolchain-22` locally with the patch applied, then rebuilt `src:pytorch` (ROCm variant) with `gfx1100/gfx1101/gfx1102` re-enabled in `PYTORCH_ROCM_ARCH`. The pytorch build succeeded — `aten/src/ATen/native/hip/Loss.hip` (previously the FTBFS point) compiles cleanly on all three affected archs, and the resulting `libtorch_hip.so` links. ## Regression risk Very low. - Fix is a 10-line diff in a single AMDGPU-specific file (`SIInstrInfo.cpp`). - It only changes what `insertSimulatedTrap` returns; the previously-returned block was an incorrect "signal to skip intermediate expansion" that produced the malformed MI stream the MC layer refuses to encode. - Every AMDGPU target uses the same code; the visible failure was gfx110x-specific because the MCInst opcode table happens to slot a pseudo there in a way that the gfx11 MC encoder catches. Other targets were saved by ordering luck; the corrected return value strictly improves behavior across the board. - Upstream ships an accompanying MIR test (`llvm/test/CodeGen/AMDGPU/simulated-trap-pseudo-expand.ll`) to lock it in. ## Cross-references - Upstream LLVM: https://github.com/llvm/llvm-project/issues/208912 - Ubuntu Launchpad: https://bugs.launchpad.net/bugs/2160428 -- System Information: Debian Release: forky/sid APT prefers resolute-updates APT policy: (500, 'resolute-updates'), (500, 'resolute-security'), (500, 'resolute') Architecture: amd64 (x86_64) Kernel: Linux 7.0.0-27-generic (SMP w/16 CPU threads; PREEMPT) Kernel taint flags: TAINT_PROPRIETARY_MODULE, TAINT_OOT_MODULE Locale: LANG=en_US.UTF-8, LC_CTYPE=en_US.UTF-8 (charmap=UTF-8) (ignored: LC_ALL set to C.UTF-8), LANGUAGE not set Shell: /bin/sh linked to /usr/bin/dash Init: systemd (via /run/systemd/system) LSM: AppArmor: enabled
