On Tue, Mar 07, 2023 at 01:13:56PM -0800, Elliott Mitchell wrote:
>
> ad15a0a8ca2515d8ac58edfc0bc1d3719219cb77
> x86/time: prevent overflow with high frequency TSCs
Okay, looks like this one had already been grabbed. Sorry for the way
too late alert. Thanks for staying on top of what was happening with
upstream Xen.
> I haven't found a patch for the other one yet. There is some issue with
> the latest generation which needs "x2apic=false" on Xen's command-line
> in order to get interrupts to domain 0. I'm guessing the latest from AMD
> broke the PIC emulation.
>
> If this isn't actually patched yet, I suspect it soon will be. I haven't
> observed anything on xen-devel, so perhaps the workaround was found too
> quickly to get noticed as urgent.
This one though looks potentially more and less serious. The workaround
is simpler than the above ("x2apic=false" on Xen's command-line, instead
of "tsc_mode = 1" for *every* VM). Yet the underlying problem could be
more severe.
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