Santiago Garcia Mantinan wrote: > I'm running current Jessie's Debian except for the kernel which is a 3.10.69 > kernel on a mips based router (http://wiki.openwrt.org/toh/arcadyan/arv7519) > the machine doesn't have floating point so I'm running with floating point > emulated. > > All the services I'm running on Debian run Ok (including apache, postfix, > squid3, isc-dhcp-server, ...) but bind9 hangs after some time, the time > doesn't seem to follow any pattern, it can be from less than 10 minutos to > some hours (not many, not a full day). > > Tying to see what happens with this problem I came around this forum: > http://community.ubnt.com/t5/EdgeMAX/How-To-Install-BIND-DNS-Server-on-EdgeRouter/td-p/558349/page/3 > a message from napsterbater that points to: > https://lists.isc.org/pipermail/bind-users/2008-August/072137.html > on wich people suggests to use --disable-atomic to solve crashes. > > I have to explain that my bind doesn't crash, it just hangs without replying > to queries or to a reload or stop command issued from the init.d script. > > However as I didn't have any better solution I tried the --disable-atomic > way. > > To do this I just added to the rules file after the kfreebsd exception this > code: > > ifeq ($(DEB_HOST_ARCH),mips) > EXTRA_FEATURES=--disable-atomic > endif > > And rebuilt bind9's packages with this code on our rules. > > This build has been in production for more than 27 hours without problems, > so It seem that the atomic fix is working. > > There might be some other ways to solve this problem, if so and you need > some testing, please let me know.
Hi, Santiago: If adding --disable-atomic to configure works around the problem, there's a problem in the implementation of the atomic operations for your architecture. I asked on the debian-mips mailing list and found that there's a problem in the isc_atomic_cmpxchg() implementation on mips. (Note that this function has been patched in the Debian package, see [0] and [1].) Can you try compiling with the attached patch (and without --disable-atomic) and see if it fixes the problem? Thanks! [0] http://anonscm.debian.org/cgit/users/lamont/bind9.git/commit/?id=14cb2d0750593e2d51c7e028a678f3fd00775fea [1] http://anonscm.debian.org/cgit/users/lamont/bind9.git/commit/?id=98b8d193db59e79d7f98df904852988ed1dd71da -- Robert Edmonds edmo...@debian.org
>From 801989597d5e7ebad86bb1d993975dfc83983133 Mon Sep 17 00:00:00 2001 From: Robert Edmonds <edmo...@debian.org> Date: Mon, 7 Sep 2015 21:27:57 -0400 Subject: [PATCH] Add earlyclobber constraint in isc_atomic_cmpxchg() on mips According to James Cowgill, The tmp register constraint should be earlyclobber ("=&r") because the other two registers (%3 and %4) will be read again after tmp (%2) is written if the code loops around. At the moment, GCC could make tmp and cmpval/val refer to the same register. (https://lists.debian.org/debian-mips/2015/09/msg00041.html) Addresses-Debian-Bug: 778720 Signed-off-by: Robert Edmonds <edmo...@debian.org> --- lib/isc/mips/include/isc/atomic.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/isc/mips/include/isc/atomic.h b/lib/isc/mips/include/isc/atomic.h index e3657d7..13b5cff 100644 --- a/lib/isc/mips/include/isc/atomic.h +++ b/lib/isc/mips/include/isc/atomic.h @@ -79,7 +79,7 @@ isc_atomic_cmpxchg(isc_int32_t *p, int cmpval, int val) { " beqz %2, 1b \n" "2: move %0, $1 \n" " .set pop \n" - : "=&r"(orig), "+R" (*p), "=r" (tmp) + : "=&r"(orig), "+R" (*p), "=&r" (tmp) : "r"(cmpval), "r"(val) : "memory"); -- 2.5.1