Quoting from upstream discussion :

--------------------------------------------------------------------

ghdl is correct here.
If i_a is converted to unsigned, you should simply declare i_a as a
natural signal.

Note that there is no uninitialised values in VHDL, that's almost
doesn't exist.
i_s is initialized to its 'left value.

--------------------------------------------------------------------

Therefore the upstream ticket has been closed as invalid; same can be
done here.

- Brian


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