Repository : ssh://darcs.haskell.org//srv/darcs/ghc On branch : master
http://hackage.haskell.org/trac/ghc/changeset/9756690fe7aa26aee6955d0b720377d53170c542 >--------------------------------------------------------------- commit 9756690fe7aa26aee6955d0b720377d53170c542 Author: Ian Lynagh <i...@well-typed.com> Date: Tue Nov 13 17:58:52 2012 +0000 Tell the compiler about alpha, mipseb and mipsel again; fixes #7339 This reverts the compiler parts of commit 7b594a5d7ac29972db39228e9c8b7f384313f39b Author: David Terei <davidte...@gmail.com> Date: Mon Nov 21 12:05:18 2011 -0800 Remove registerised code for dead architectures: mips, ia64, alpha, hppa1, m68k In particular, we want to know whether bewareLoadStoreAlignment should return True or False for them. It also reverts commit 3fc68b5c356b39b2b52a86d953367d0021c13262 Author: Simon Marlow <marlo...@gmail.com> Date: Wed Jan 4 11:44:02 2012 +0000 Remove missing archs (mipseb, mipsel, alpha) (#5734) It doesn't hurt to map these to ArchUnknown since we don't need to know anything specific about them, and adding them would be a pain (there are a bunch of places where we have to case-match on all the arches to avoid warnings). aclocal.m4 | 11 ++++++++++- compiler/cmm/PprC.hs | 3 +++ compiler/nativeGen/AsmCodeGen.lhs | 6 ++++++ compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs | 12 ++++++++++++ compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs | 3 +++ compiler/nativeGen/RegAlloc/Linear/Main.hs | 3 +++ compiler/nativeGen/TargetReg.hs | 15 +++++++++++++++ compiler/utils/Platform.hs | 3 +++ 8 files changed, 55 insertions(+), 1 deletions(-) Diff suppressed because of size. To see it, use: git show 9756690fe7aa26aee6955d0b720377d53170c542 _______________________________________________ Cvs-ghc mailing list Cvs-ghc@haskell.org http://www.haskell.org/mailman/listinfo/cvs-ghc
