Thanks. I've done that and i have gotten a gpio output. Should it look like this? gpiobase+0x0000: 0xffffffff (GPIO_USE_SEL) gpiobase+0x0004: 0xffffffff (GP_IO_SEL) gpiobase+0x0008: 0xffffffff (RESERVED) gpiobase+0x000c: 0xffffffff (GP_LVL) gpiobase+0x0010: 0xffffffff (RESERVED) gpiobase+0x0014: 0xffffffff (RESERVED) gpiobase+0x0018: 0xffffffff (GPO_BLINK) gpiobase+0x001c: 0xffffffff (GP_SER_BLINK) gpiobase+0x0020: 0xffffff03 (GP_SB_CMDSTS) gpiobase+0x0024: 0xffffff03 (GP_SB_DATA) gpiobase+0x0028: 0xff03 (GPI_NMI_EN) gpiobase+0x002a: 0xffff (GPI_NMI_STS) gpiobase+0x002c: 0xffffff03 (GPI_INV) gpiobase+0x0030: 0xffffff03 (GPIO_USE_SEL2) gpiobase+0x0034: 0xffffff03 (GP_IO_SEL2) gpiobase+0x0038: 0xffffff03 (GP_LVL2) gpiobase+0x003c: 0xffffff03 (RESERVED) gpiobase+0x0040: 0xffffffff (GPIO_USE_SEL3) gpiobase+0x0044: 0xffffffff (GP_IO_SEL3) gpiobase+0x0048: 0xffffffff (GPIO_LVL3) gpiobase+0x004c: 0x0130ffff (RESERVED) gpiobase+0x0050: 0xffffffff (RESERVED) gpiobase+0x0054: 0xffffffff (RESERVED) gpiobase+0x0058: 0xffffffff (RESERVED) gpiobase+0x005c: 0xffffffff (RESERVED) gpiobase+0x0060: 0xffffffff (GP_RST_SEL1) gpiobase+0x0064: 0xffffffff (GP_RST_SEL2) gpiobase+0x0068: 0xffffffff (GP_RST_SEL3) gpiobase+0x006c: 0xffffffff (RESERVED) gpiobase+0x0070: 0x00022600 (RESERVED) gpiobase+0x0074: 0x0002260a (RESERVED) gpiobase+0x0078: 0xffffffff (RESERVED) gpiobase+0x007c: 0xffffffff (RESERVED)
On Tue, May 21, 2019 at 5:05 PM Justin Dong-Il Lee <[email protected]> wrote: > Thanks. I've done that and i have gotten a gpio output. Should it look > like this? > gpiobase+0x0000: 0xffffffff (GPIO_USE_SEL) > gpiobase+0x0004: 0xffffffff (GP_IO_SEL) > gpiobase+0x0008: 0xffffffff (RESERVED) > gpiobase+0x000c: 0xffffffff (GP_LVL) > gpiobase+0x0010: 0xffffffff (RESERVED) > gpiobase+0x0014: 0xffffffff (RESERVED) > gpiobase+0x0018: 0xffffffff (GPO_BLINK) > gpiobase+0x001c: 0xffffffff (GP_SER_BLINK) > gpiobase+0x0020: 0xffffff03 (GP_SB_CMDSTS) > gpiobase+0x0024: 0xffffff03 (GP_SB_DATA) > gpiobase+0x0028: 0xff03 (GPI_NMI_EN) > gpiobase+0x002a: 0xffff (GPI_NMI_STS) > gpiobase+0x002c: 0xffffff03 (GPI_INV) > gpiobase+0x0030: 0xffffff03 (GPIO_USE_SEL2) > gpiobase+0x0034: 0xffffff03 (GP_IO_SEL2) > gpiobase+0x0038: 0xffffff03 (GP_LVL2) > gpiobase+0x003c: 0xffffff03 (RESERVED) > gpiobase+0x0040: 0xffffffff (GPIO_USE_SEL3) > gpiobase+0x0044: 0xffffffff (GP_IO_SEL3) > gpiobase+0x0048: 0xffffffff (GPIO_LVL3) > gpiobase+0x004c: 0x0130ffff (RESERVED) > gpiobase+0x0050: 0xffffffff (RESERVED) > gpiobase+0x0054: 0xffffffff (RESERVED) > gpiobase+0x0058: 0xffffffff (RESERVED) > gpiobase+0x005c: 0xffffffff (RESERVED) > gpiobase+0x0060: 0xffffffff (GP_RST_SEL1) > gpiobase+0x0064: 0xffffffff (GP_RST_SEL2) > gpiobase+0x0068: 0xffffffff (GP_RST_SEL3) > gpiobase+0x006c: 0xffffffff (RESERVED) > gpiobase+0x0070: 0x00022600 (RESERVED) > gpiobase+0x0074: 0x0002260a (RESERVED) > gpiobase+0x0078: 0xffffffff (RESERVED) > gpiobase+0x007c: 0xffffffff (RESERVED) > > On Tue, May 21, 2019 at 4:18 PM Matt DeVillier <[email protected]> > wrote: > >> whoops, I meant inteltool, not intelmetool >> >> On Tue, May 21, 2019 at 6:14 PM Matt DeVillier <[email protected]> >> wrote: >> >>> support already exists in intelmetool for several 7th-gen/Kabylake >>> platforms, just not KBL-H. Easiest thing to try would be to add the PCI >>> IDs into inteltool.h next to the existing ones for KBL north/south bridges >>> (ie, add: #define PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_H 0x5910) then add it >>> everywhere the existing ones are referenced (inteltool.c, memory.c, pcie.c) >>> and then recompile. Actual looks like the southbridge already is, so just >>> add the northbridge as per above >>> >>> On Tue, May 21, 2019 at 5:03 PM Justin Dong-Il Lee <[email protected]> >>> wrote: >>> >>>> As the subject states, whenever I run inteltool -a under root, I do not >>>> get any outputs. My dump is listed below. I am running a kaby lake 7820hq >>>> for reference. Any help would be appreciated. Is kaby lake not supported >>>> for coreboot? >>>> Best, >>>> ~Justin >>>> >>>> CPU: ID 0x906e9, Processor Type 0x0, Family 0x6, Model 0x9e, Stepping >>>> 0x9 >>>> Northbridge: 8086:5910 (unknown) >>>> Southbridge: 8086:a154 (CM238) >>>> IGD: 8086:591b (Intel(R) UHD Graphics 630) >>>> Error: Dumping GPIOs on this southbridge is not (yet) supported. >>>> >>>> >>>> >>>> ============= RCBA ============== >>>> >>>> Error: Dumping RCBA on this southbridge is not (yet) supported. >>>> >>>> >>>> >>>> ========== PMBASE/ABASE ========= >>>> >>>> Error: Dumping PMBASE on this southbridge is not (yet) supported. >>>> >>>> >>>> >>>> ============= MCHBAR ============ >>>> >>>> Error: Dumping MCHBAR on this northbridge is not (yet) supported. >>>> >>>> >>>> >>>> ============= EPBAR ============= >>>> >>>> Error: Dumping EPBAR on this northbridge is not (yet) supported. >>>> >>>> >>>> >>>> ============= DMIBAR ============ >>>> >>>> Error: Dumping DMIBAR on this northbridge is not (yet) supported. >>>> >>>> >>>> ========= PCIEXBAR ======== >>>> >>>> Error: Dumping PCIEXBAR on this northbridge is not (yet) supported. >>>> >>>> >>>> Error: Dumping MSRs on this CPU (0x0906e0) is not (yet) supported. >>>> >>>> >>>> >>>> ============= AMBs ============ >>>> >>>> Error: Dumping AMBs on this MCH is not (yet) supported. >>>> >>>> ============= SPI / BIOS CNTL ============= >>>> >>>> Error: Dumping SPI on this southbridge is not (yet) supported. >>>> >>>> ============= AHCI Registers ============== >>>> >>>> ABAR = 0xdf32b000 (MEM) >>>> >>>> >>>> _______________________________________________ >>>> coreboot mailing list -- [email protected] >>>> To unsubscribe send an email to [email protected] >>>> >>>
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